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II - DCE FEL ČVUT v Praze

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SIMATIC S7 HART Analog Modules<br />

HART status bytes<br />

4-14<br />

Each HART command is followed by a HART response containing data and<br />

status bytes (see 4.8.3). The status bytes provide information on:<br />

Device status of the connected field device (e.g. modification of<br />

parameters)<br />

Communication error during transmission between HART analog module<br />

and the connected field device<br />

Command error during interpretation of the HART command by the<br />

connected field device (warning, rather than error)<br />

The HART status bytes are entered in the response data record unchanged<br />

(see Section 4.8.3). Their significance is described in the technical<br />

specifications for HART. You can use SFC59 to read the data records in your<br />

user program.<br />

4.5.2 Interrupts of the HART Analog Modules<br />

Overview of the<br />

interrupts<br />

Hardware<br />

interrupts with<br />

AI HART<br />

The general interrupt behavior of the HART analog module corresponds to<br />

that of the other SIMATIC S7-Ex analog modules, see Section 3.6.5. You can<br />

set parameters to enable or disable any interrupt (see Section 4.4).<br />

There are two types of hardware interrupt: “Hardware interrupt when limit<br />

value exceeded” and “Hardware interrupt on end of cycle.” When a hardware<br />

interrupt is triggered, you can evaluate the local data in OB40:<br />

Table 4-8 Local data in OB40<br />

Local data<br />

OB40<br />

Bit<br />

7 ...4<br />

Bit<br />

3<br />

Bit<br />

2<br />

Bit<br />

1<br />

Bit<br />

0<br />

Limit exceeded<br />

Byte 0 ‘0’ ‘0’ ‘0’ Channel 1 Channel 0 Upper limit exceeded<br />

Byte 1 ‘0’ ‘0’ ‘0’ Channel 1 Channel 0 Lower limit exceeded<br />

Byte 2 ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ Not relevant<br />

Byte 3 ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ Not relevant<br />

At the end of the cycle all the bits in bytes 0-3 of the additional information<br />

for OB40 which are not reserved for channels 0 and 1 are set to ‘1’. You can<br />

use the reserved bits to evaluate whether the upper or lower limit set has been<br />

exceeded for a particular channel: if a limit has been exceeded, a ‘1’ is<br />

displayed instead of a ‘0’.<br />

I/O Modules with Intrinsically-Safe Signals<br />

C79000-G7076-C152-04

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