23.11.2014 Views

xxiii πανελληνιο συνεδριο φυσικης στερεας καταστασης & επιστημης ...

xxiii πανελληνιο συνεδριο φυσικης στερεας καταστασης & επιστημης ...

xxiii πανελληνιο συνεδριο φυσικης στερεας καταστασης & επιστημης ...

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

References<br />

[1] CH Lee, J. Meteer, V. Narayanan, EC Kan, J. Electronic Mater. 34 (2005) 1<br />

[2] JJ Lee, Y. Harada, JW Pyun, DL Kwong, Appl. Phys. Lett. 86 103505 (2005)<br />

[3] J. Dufourcq, P. Mur, M.J. Gordon, S. Minoret, R. Coppard and T. Baron, Materials Science and Engineering: C, in press<br />

(available in sciencedirect)<br />

Fig 1: Nanoparticle source schematic.<br />

Fig.2 TEM plane view images of as deposited<br />

nanoparticles. The bar corresponds to 20 nm.<br />

C/C ox<br />

1.0<br />

0.8<br />

0.6<br />

0.4<br />

-6 -4 -2 0 2 4<br />

Gate Bias (V)<br />

0.2 1V/-1V/1V<br />

3V/-3V/3V<br />

5V/-5V/5V<br />

0.0<br />

-6 -4 -2 0 2 4<br />

C/C ox<br />

1.0<br />

0.8<br />

0.6<br />

0.4<br />

0.2<br />

Gate Bias (V)<br />

1V/-1V/1V<br />

3V/-3V/3V<br />

5V/-5V/5V<br />

Flat-Band Voltage Shift (V)<br />

1.0<br />

0.5<br />

0.0<br />

-0.5<br />

-1.0<br />

-1.5<br />

-2.0<br />

1 2 3 4 5 6 7<br />

Gate Sweep Bias (V)<br />

Fig 3: C-V characteristics for 10nm thick HfO 2 memory<br />

device. In the inset the C-V curves for the reference sample<br />

are shown.<br />

Fig.4: Flat-band voltage shifts for 10nm thick HfO 2<br />

memory device under sweep bias operation.<br />

C/C ox<br />

1.0<br />

0.8<br />

0.6<br />

0.4<br />

0.0<br />

-6 -4 -2 0 2 4<br />

Gate Bias (V)<br />

1V/-1V/1V<br />

0.2 3V/-3V/3V<br />

5V/-5V/5V<br />

7V/-7V/7V<br />

0.0<br />

-6 -4 -2 0 2 4<br />

C/C ox<br />

1.0<br />

0.8<br />

0.6<br />

0.4<br />

0.2<br />

Gate Bias (V)<br />

1V/-1V/1V<br />

3V/-3V/3V<br />

5V/-5V/5V<br />

Flat-Band Voltage Shift (V)<br />

1.0<br />

0.5<br />

0.0<br />

-0.5<br />

-1.0<br />

-1.5<br />

-2.0<br />

1 2 3 4 5 6 7<br />

Gate Sweep Bias (V)<br />

Fig 5: C-V characteristics for 25nm thick HfO 2 memory<br />

device. In the inset the C-V curves for the reference sample<br />

are shown.<br />

Fig 6: Flat-band voltage shifts for 25nm thick HfO 2 memory<br />

device under sweep bias operation.<br />

22

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!