Cisco Broadband Cable Command Reference Guide

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CHAPTER
Commands for the Cisco uBR10012 Router
Cisco Broadband Cable Command Reference Guide
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This chapter documents the following commands that are unique to the Cisco uBR10012 router and its
Performance Routing Engine (PRE1) modules. This chapter contains the following sections:
Performance Routing Engine Overview, page 3-1
Command Reference, page 3-4
Note Unless otherwise indicated, all references to PRE in this document refer to both the PRE and PRE1
models of the Performance Routing Engine modules.
Tip For information on the other, cable-specific commands for the Cisco uBR10012 router, see Chapter 2,
“Cisco Cable Modem Termination System Commands.” For information about debugging commands for
the Cisco uBR10012 router and other Cisco CMTS routers, see Chapter 4, “Cisco Cable Modem
Termination System Debugging Commands.”
Performance Routing Engine Overview
The majority of the Layer 2 and Layer 3 processing on the Cisco uBR10012 universal broadband router
is done by the Performance Routing Engine (PRE) module. The PRE module uses advanced
application-specific integrated circuit (ASIC) technology, which supports very high performance
throughput of IP services over each port.
The PRE module contains two main processor assemblies:
Forwarding path (FP) card—The FP card contains the backplane interconnect and two Parallel
Express Forwarding (PXF) network processors. The FP assembly executes packet forwarding
algorithms on every packet flowing through the router.
Route processing (RP) card— The RP card plugs into the FP card and executes the complicated
control plane algorithms required for initialization and management of the forwarding path. The RP
contains the configuration and management route processing engine, which runs routing protocols,
does route update calculations and handles other control plane functions such as the SNMP agent
and command line interface (CLI).
Allocating these two classes of functions to separate processing paths yields the best possible balance
between packet throughput and feature set flexibility. Figure 3-1 shows a basic block diagram showing
the interaction of the FP and RP assemblies.
3-1