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Intel® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

Intel® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

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Register Description3.7.11 MMADR—Memory-Mapped Range Address Register(Device 2)Address Offset:Default Value:Access:Size:14−17h00000000hR/W, RO32 bitsThis register requests allocation for the IGD registers and instruction ports. The allocation is for512 KB and the base address is defined by bits [31:19].BitDescription31:19 Memory Base Address⎯R/W. Set by the OS, these bits correspond to address signals [31:19].18:4 Address Mask⎯RO. Hardwired to 0s to indicate 512-KB address range.3 Prefetchable Memory⎯RO. Hardwired to 0 to prevent prefetching.2:1 Memory Type⎯RO. Hardwired to 00 to indicate 32-bit address.0 Memory / IO Space⎯RO. Hardwired to 0 to indicate memory space.3.7.12 IOBAR—I/O Decode Register (Device 2)Address Offset:Default Value:Access:Size:18−1Bh00000001hR/W, RO32 bitsThis register provides the base offset of the I/O registers within Device 2. Bits 15:3 areprogrammable allowing the I/O base to be located anywhere in 16-bit I/O address space. Bits 2:1are fixed and return 0s; bit 0 is hardwired to 1 indicating that 8 bytes of I/O space are decoded.Access to the 8 bytes of I/O space is allowed in power management (PM) state D0 when the I/OEnable bit (PCICMD2 bit 0) is set. Access is disallowed in PM states D1–D3 if:• the I/O Enable bit is 0• Device 2 is turned off• Internal graphics is disabled thru the fuse mechanisms.Note that access to the IOBAR register is independent of VGA functionality in Device 2. Also,note that this mechanism is available o<strong>nl</strong>y through function 0 of Device 2.If accesses to the IOBAR is allowed, the GMCH claims all 8-, 16- or 32-bit I/O cycles from theprocessor that falls within the 8 bytes claimed.BitDescription31:16 Reserved. Read as 0.15:3I/O Base Address—R/W. This field is set by the OS. These bits correspond to address signals15:3. They provide the 16-bit I/O base address for the I/O registers.2:1 Memory Type⎯RO. Hardwired to 00 to indicate 32-bit address.0 I/O Space⎯RO. Hardwired to 1 to indicate I/O space.<strong>Intel</strong> ® 82<strong>865G</strong>/82<strong>865G</strong>V GMCH <strong>Datasheet</strong> 107

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