Intel® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

Electrical CharacteristicsTable 38. DC Characteristics (Sheet 3 of 3)SymbolSignalGroupParameter Min Nom Max Unit Notes2.6 V Miscellaneous Signals (3.3 V tolerant)V IL (t) 2.6 V Input Low Voltage 0.4 VV IH (t) 2.6 V Input High Voltage VCC_DDR – 0.4 VCC_DAC VI LEAK (t)2.6 V Input LeakageCurrent±50 µAC IN (t) 2.6 V Input Capacitance 5.5 pF3.3 V Miscellaneous SignalsV IL (o) 3.3V Input Low Voltage 0.4 VV IH (o) 3.3 V Input High Voltage VCC_DAC – 0.4 VCC_DAC VV OLV OHI OLI OH(o)(o)(o)(o)3.3 V Output LowVoltage3.3 V Output HighVoltage3.3 V Output LowCurrent3.3 V Output HighCurrent0.2 VVCC_DAC – 0.2 V50 mA @V OL max–50 mA @V OH minI LEAK (o)3.3 V Input LeakageCurrent±50 µAC IN (o) 3.3 V Input Capacitance 5.5 pFFSB Select SignalsClocksV IL (w) Input Low Voltage 0.4 VV IH (w) Input High Voltage 0.8 VV IL (x) Input Low Voltage 0.4 VV IH (x) Input High Voltage VCC_DDR – 0.4 VCC_DAC V 1I LEAK (x) Input Leakage Current 100 µAC IN (x) Input Capacitance 5.5 pFV CROSS(abs)V CROSS(rel)(j)(j)Absolute CrossingVoltageRelative CrossingVoltage0.250 NA 0.550 V 2,30.250 + 0.5(V Havg – 0.700)0.550 +0.5(V Havg – 0.700)V 3,4,5NOTES:1. Absolute max overshoot = 4.5 V2. Crossing voltage is defined as the instantaneous voltage value when the rising edge of HCLKP equals thefalling edge of HCLKN.3. The crossing point must meet the absolute and relative crossing point specifications simultaneously.4. V Havg is the statistical average of the V H measured by the oscilloscope.5. VHavg can be measured directly using “Vtop” on Agilent* oscilloscopes and “High” on Tektronixoscilloscopes.6. Maximum leakage current specification for the GVREF pin is 65 uA. The Maximum leakage currentspecification for the GVSWING pin is 50 µA. Refer to Intel ® 865G/865GV/865PE/865P Chipset PlatformDesign Guide for the resistor divider circuit details that take this specification into account.7. Maximum leakage current specification for HI_VREF and HI_SWING pins is 50 µA. Refer to 865G/865GV/865PE/865P Chipset Platform Design Guide for the resistor divider circuit details that take this specificationinto account.8. Maximum leakage current specification for CI_VREF and CI_SWING pins is 50 µA. Refer to 865G/865GV/865PE Chipset Platform Design Guide for the resistor divider circuit details that take this specification intoaccount.Intel ® 82865G/82865GV GMCH Datasheet 193