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Intel® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

Intel® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

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Functional DescriptionIntegrated RAMDACThe display function contains a RAM-based Digital-to-Analog Converter (RAMDAC) thattransforms the digital data from the graphics and video subsystems to analog data for the CRTmonitor. GMCH’s integrated 350 MHz RAMDAC supports resolutions up to 2048 x 1536 @75 Hz. Three 8-bit DACs provide the RED, GREEN, and BLUE signals to the monitor.Sync SignalsHSYNC and VSYNC signals are digital and conform to TTL signal levels at the connector. Sincethese levels cannot be generated internal to the device, external level shifting buffers are required.These signals can be polarity adjusted and individually disabled in one of the two possible states.The sync signals should power up disabled in the high state. No composite sync or special flatpanel sync support is included.VESA/VGA ModeVESA/VGA mode provides compatibility for pre-existing software that set the display mode usingthe VGA CRTC registers. Timings are generated based on the VGA register values and the timinggenerator registers are not used.DDC (Display Data Channel)DDC is a standard defined by VESA. Its purpose is to allow communication between the hostsystem and display. Both configuration and control information can be exchanged allowing plugand-playsystems to be realized. Support for DDC 1 and 2 is implemented. The GMCH uses theDDCA_CLK and DDCA_DATA to communicate with the analog monitor. The GMCH generatesthese signals at 2.6 V. External pull-up resistors and level shifting circuitry should be implementedon the board.The GMCH implements a hardware GMBus controller that can be used to control these signals.This allows higher speed transactions (up to 400 kHz) on theses lines than previous softwarecentric ‘bit-bashing’ techniques.5.5.2 Digital Display InterfaceThe GMCH has several options for driving digital displays. The GMCH contains two DVO portsthat are multiplexed on the AGP interface. When an external AGP graphics accelerator is notpresent, the GMCH can use the multiplexed DVO ports to provide extra digital display options.These additional digital display capabilities may be provided through an ADD card that is designedto plug in to a 1.5 V AGP connector.5.5.2.1 Digital Display Channels – <strong>Intel</strong> ® DVOB and <strong>Intel</strong> ® DVOCThe GMCH has the capability to support digital display devices through two DVO portsmultiplexed with the AGP signals. When an external graphics accelerator is used via AGP, theseDVO ports are not available. Refer to Section 2.5.6 for a detailed description of the shared DVOsignals.The shared DVO ports each support a pixel clock up to 165 MHz and can support a variety oftransmission devices. When using a 24-bit external transmitter, it will be possible to pair the twoDVO ports in dual-channel mode to support a single digital display with higher resolutions andrefresh rates. In this mode, the GMCH is capable of driving a pixel clock up to 330 MHz.<strong>Intel</strong> ® 82<strong>865G</strong>/82<strong>865G</strong>V GMCH <strong>Datasheet</strong> 177

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