IntelÂ® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

More documents

Recommendations

Info

TestabilityTable 51. XOR Chain 7 (45 Inputs) Output Pins: SDM_A7, SDM_B7Signal Name Ball Number Signal Name Ball Number Signal Name Ball NumberHADSTB1# D28 SDQS_B6 L27 SDQ_B41 W30SDQ_B57 H29 SDQ_B48 P29 SDQS_B5 U30SDQ_B61 M25 SDQ_B49 R30 SDQ_B37 AB29SDQ_B58 F32 SDQ_B52 R31 SDQ_B36 AE31SDQ_B63 G32 SCMDCLK_B5 N31 SDQ_B35 Y29SDQ_B60 N25 SCMDCLK_B5# N30 SDQ_B32 AE30SDQS_B7 J30 SCMDCLK_B2# N26 SDQ_B34 AC30SDQ_B62 J29 SCMDCLK_B2 N27 SDQ_B38 AA26SDQ_B59 G33 SDQ_B43 T25 SDQ_B33 AC27SDQ_B56 K30 SDQ_B46 U25 SDQ_B39 AA27SDQ_B51 L30 SDQ_B42 U27 SDQS_B4 AD29SDQ_B54 P25 SDQ_B47 R27 SCMDCLK_B0 AG29SDQ_B55 L32 SDQ_B45 V29 SCMDCLK_B0# AG30SDQ_B53 R26 SDQ_B40 AA30 SCMDCLK_B3 AJ30SDQ_B50 K28 SDQ_B44 AA31 SCMDCLK_B3# AH29Output PinsSDM_A7SDM_B7H32J31Table 52. XOR Chain 8 (40 Inputs) Output Pins: SDM_A8, SDM_B8Signal Name Ball Number Signal Name Ball Number Signal Name Ball NumberSDQ_B30 AD25 SDQ_B21 AK21 SDQ_B8 AE17SDQ_B26 AG27 SDQ_B17 AE20 SCMDCLK_B4# AL15SDQ_B29 AJ27 SDQS_B2 AG21 SCMDCLK_B4 AK15SDQ_B27 AF27 SDQ_B16 AE19 SCMDCLK_B1# AG17SDQ_B31 AF28 SDQ_B20 AL19 SCMDCLK_B1 AF17SDQ_B25 AH26 SDQ_B10 AK17 SDQ_B1 AE15SDQS_B3 AH27 SDQ_B14 AJ16 SDQ_B3 AE16SDQ_B28 AJ26 SDQ_B15 AJ18 SDQ_B7 AG12SDQ_B24 AK25 SDQ_B11 AL17 SDQ_B2 AL11SDQ_B23 AE22 SDQ_B13 AJ14 SDQ_B6 AK11SDQ_B18 AG23 SDQ_B12 AK13 SDQ_B5 AF12SDQ_B19 AK23 SDQ_B9 AL13 SDQ_B0 AJ10SDQ_B22 AJ24 SDQS_B1 AG13 SDQ_B4 AL8SDQS_B0 AF15Output PinsHTRDY#BPRI#D24B26218 Intel ® 82865G/82865GV GMCH Datasheet
TestabilityTable 53. XOR Chain 9 (62 Inputs) Output Pins: RS2#, DEFER#Signal Name Ball Number Signal Name Ball Number Signal Name Ball NumberSCAS_A# Y34 SMAA_B0 AG31 SMAA_B7 AF21SWE_A# AB34 SMAB_A1 AL34 SMAA_B9 AJ22SCS_B3# W25 SMAA_A6 AL28 SMAA_B11 AL21SBA_B1 AA25 SMAA_B6 AL25 SMAA_B4 AK27SBA_A1 AH34 SMAB_A3 AP32 SMAA_B5 AG25SCS_A1# Y31 SMAB_A2 AM34 SCKE_A3 AP20SCS_A2# Y32 SMAA_A3 AN31 SCKE_A0 AL20SCS_A3# W34 SMAA_B3 AE24 SMAA_A11 AN23SRAS_A# AC33 SMAA_B1 AJ31 SMAA_A12 AN21SBA_A0 AE33 SMAB_B3 AL29 SCKE_A2 AM20SCS_A0# AA34 SMAA_A4 AL30 SCKE_A1 AN19SMAA_B2 AD27 SMAB_B4 AL27 SCKE_B0 AK19SRAS_B# W26 SMAB_B2 AD26 SCKE_B3 AE18SMAA_B10 AF29 SMAB_A4 AP31 SCKE_B2 AG19SBA_B0 Y25 SMAB_A5 AM26 SMAA_B12 AJ20SMAA_A10 AJ33 SMAA_A9 AP24 SCKE_B1 AF19SMAB_B1 AE27 SMAB_B5 AE23 SCS_B1# T29SMAA_A0 AJ34 SMAA_A8 AP26 SCS_B0# U26SMAA_A1 AL33 SMAA_A5 AL26 SCS_B2# V25SMAA_A2 AK29 SMAA_A7 AN25 SWE_B# W27SMAA_B8 AL23 SCAS_B# W31Output PinsRS2#DEFER#B27L21Intel ® 82865G/82865GV GMCH Datasheet 219
Page 1 and 2:
Intel ® 865G/865GV ChipsetDatashee
Page 3:
Contents1 Introduction.............
Page 6 and 7:
3.8 PCI-to-CSA Bridge Registers (De
Page 8 and 9:
5.5.3 Synchronous Display .........
Page 10 and 11:
Tables1 General Terminology .......
Page 14:
This page is intentionally left bla
Page 20 and 21:
Introduction1.4 Intel ® 82865G GMC
Page 24:
Introduction1.4.7 Display Interface
Page 27 and 28:
Signal Description2.1 Host Interfac
Page 29 and 30:
Signal DescriptionSignal Name Type
Page 31 and 32:
Signal Description2.2.2 DDR SDRAM C
Page 33 and 34:
Signal Description2.5 AGP Interface
Page 35 and 36:
Signal Description2.5.4 AGP Strobes
Page 37 and 38:
Signal DescriptionSignal Name Type
Page 39 and 40:
Signal Description2.5.7 Intel ® DV
Page 41 and 42:
Signal Description2.7 Clocks, Reset
Page 44 and 45:
Signal Description2.10 GMCH Sequenc
Page 46 and 47:
Signal Description2.12 Full and War
Page 48 and 49:
Register DescriptionTermReservedReg
Page 50 and 51:
Register Description3.3 Routing Con
Page 52 and 53:
Register DescriptionIf the Bus Numb
Page 54 and 55:
Register Description3.4.2 CONFIG_DA
Page 56 and 57:
Register DescriptionTable 6.DRAM Co
Page 58 and 59:
Register Description3.5.3 PCICMD—
Page 60 and 61:
Register Description3.5.5 RID—Rev
Page 62 and 63:
Register Description3.5.10 APBASE
Page 64 and 65:
Register Description3.5.14 AGPM—A
Page 66 and 67:
Register DescriptionNotes on Pre-Al
Page 68 and 69:
Register Description3.5.17 FPLLCONT
Page 70 and 71:
Register DescriptionAs an example,
Page 72 and 73:
Register Description3.5.20 SMRAM—
Page 74 and 75:
Register Description3.5.22 ACAPID
Page 76 and 77:
Register Description3.5.24 AGPCMD
Page 78 and 79:
Register Description3.5.26 APSIZE
Page 80 and 81:
Register Description3.5.29 LPTT—A
Page 82 and 83:
Register Description3.5.31 GMCHCFG
Page 84 and 85:
Register Description3.5.32 ERRSTS
Page 86 and 87:
Register Description3.5.34 SKPD—S
Page 88 and 89:
Register Description3.6.1 VID1—Ve
Page 90 and 91:
Register Description3.6.4 PCISTS1
Page 92 and 93:
Register Description3.6.8 MLT1—Ma
Page 94 and 95:
Register Description3.6.14 IOBASE1
Page 96 and 97:
Register Description3.6.17 MBASE1
Page 100:
Register Description3.6.22 ERRCMD1
Page 105 and 106:
Register Description3.7.6 CC—Clas
Page 107 and 108:
Register Description3.7.11 MMADR—
Page 109 and 110:
Register Description3.7.16 CAPPOINT
Page 111 and 112:
Register Description3.7.22 PMCAP—
Page 113 and 114:
Register Description3.8 PCI-to-CSA
Page 115 and 116:
Register Description3.8.3 PCICMD3
Page 117 and 118:
Register Description3.8.5 RID3—Re
Page 119 and 120:
Register Description3.8.11 SBUSN3
Page 121 and 122:
Register Description3.8.15 SSTS3—
Page 123 and 124:
Register Description3.8.17 MLIMIT3
Page 125 and 126:
Register Description3.8.20 BCTRL3
Page 127 and 128:
Register Description3.9 Overflow Co
Page 129 and 130:
Register Description3.9.4 PCISTS6
Page 131 and 132:
Register Description3.9.9 BAR6—Me
Page 133 and 134:
Register DescriptionThe remaining 7
Page 135 and 136:
Register Description3.10.3 DRT—DR
Page 137 and 138:
Register DescriptionBit6:4Descripti
Page 139 and 140:
System Address MapSystem Address Ma
Page 141 and 142:
System Address Map4.2 Compatibility
Page 143 and 144:
System Address Map4.3 Extended Memo
Page 145 and 146:
System Address MapPCI Memory Addres
Page 147 and 148:
Functional DescriptionFunctional De
Page 149 and 150:
Functional Description5.2 System Me
Page 151 and 152:
Functional Description5.2.2.1 Dynam
Page 153 and 154:
Functional DescriptionTable 21. DRA
Page 155 and 156:
Functional DescriptionTable 23. DRA
Page 157 and 158:
Functional Description5.2.6 Configu
Page 159 and 160:
Functional Description5.3.1 GMCH AG
Page 161 and 162:
Functional Descriptiondown controll
Page 163 and 164:
Functional Description5.3.6 Support
Page 165 and 166:
Functional Description5.4.1 3D Engi
Page 167 and 168: Functional DescriptionTexture Forma
Page 169 and 170: Functional DescriptionTexture Map B
Page 171 and 172: Functional DescriptionDepth BufferT
Page 173 and 174: Functional Description5.4.3 Video E
Page 175 and 176: Functional Description5.4.5 PipesSc
Page 177 and 178: Functional DescriptionIntegrated RA
Page 179 and 180: Functional DescriptionDirect YUV fr
Page 181 and 182: Functional Description• System—
Page 183 and 184: Functional Description5.8 ClockingT
Page 185 and 186: Electrical CharacteristicsElectrica
Page 187 and 188: Electrical CharacteristicsTable 36.
Page 189 and 190: Electrical Characteristics6.5 DC Pa
Page 195 and 196: Electrical Characteristics6.6.3 DAC
Page 197 and 198: Ballout and Package InformationBall
Page 199 and 200: Ballout and Package InformationFigu
Page 201 and 202: Ballout and Package InformationTabl
Page 209 and 210: Ballout and Package Information7.2
Page 211 and 212: TestabilityTestability 8In the GMCH
Page 213 and 214: Testability8.2 XOR Chain Definition
Page 215 and 216: TestabilityTable 45. XOR Chain 1 (3
Page 217: TestabilityTable 49. XOR Chain 5 (4
Page 221 and 222: Intel ® 82865GV GMCHIntel ® 82865
Page 223 and 224: Intel ® 82865GV GMCH9.3 Intel ® 8
Page 225 and 226: Intel ® 82865GV GMCHGMCHCFG—GMCH
Page 227 and 228: Intel ® 82865GV GMCH BalloutIntel
Page 229 and 230: Intel ® 82865GV GMCH BalloutFigure
Page 231 and 232: Intel ® 82865GV GMCH BalloutTable
Page 241 and 242: Intel ® 82865GV GMCH TestabilityIn
Page 243 and 244: Intel ® 82865GV GMCH Testability11
Page 245 and 246: Intel ® 82865GV GMCH TestabilityTa
show all

IntelÂ® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

Create successful ePaper yourself

Delete template?

Save as template?