IntelÂ® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

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Ballout and Package InformationTable 42. Intel ® 82865GBall List bySignal NameSignal Name Ball #Table 42. Intel ® 82865GBall List bySignal NameSignal Name Ball #Table 42. Intel ® 82865GBall List bySignal NameSignal Name Ball #VSSAE12VSSAN18VSSK18VSSAE13VSSAN20VSSK20VSSAE25VSSAN22VSSK22VSSAE26VSSAN24VSSK25VSSAE32VSSAN26VSSK27VSSAE35VSSAN28VSSY27VSSAE4VSSH18VSSY28VSSAF11VSSH2VSSY3VSSAF14VSSH20VSSY30VSSAF16VSSH22VSSY33VSSAF18VSSH24VSSY35VSSAF20VSSH26VSSY6VSSAF22VSSH30VSSY8VSSAL1VSSH33VSSY9VSSAL32VSSH5VSSA_DACD3VSSAM11VSSH8VSYNCE2VSSAM13VSSH9VTTA15VSSAM15VSSJ10VTTA21VSSAM17VSSJ12VTTA4VSSAM19VSSJ14VTTA5VSSAM21VSSJ16VTTA6VSSAM23VSSJ18VTTB5VSSAM25VSSJ20VTTB6VSSAM27VSSJ22VTTC5VSSAM29VSSJ28VTTC6VSSAM35VSSJ32VTTD5VSSAM9VSSJ35VTTD6VSSAN10VSSK11VTTD7VSSAN12VSSK12VTTE6VSSAN14VSSK14VTTE7VSSAN16VSSK16VTTF7208 Intel ® 82865G/82865GV GMCH Datasheet
Ballout and Package Information7.2 GMCH Package InformationThe GMCH is in a 37.5 mm x 37.5 mm Flip Chip Ball Grid Array (FC-BGA) package with 932 solder balls.Figure 18 and Figure 19 show the package dimensions.Figure 18. Intel ® 82865G GMCH Package Dimensions (Top and Side Views)Top ViewDetail A17.925037.50 ±0.05018.75Detail A18.75 17.925037.50 ±0.0516.9500Detail B16.9500Detail CSide View0.500 ±0.070SubstrateDieSee Detail D1.08 ±0.06A0.200Detail ADetail BDetail CDetail D0.203 C A B0.203 C A B0.74 ±0.025UnderfillEpoxyϕ 0.6500 ±0.05ϕ 0.500ϕ 1.1500 ±0.05ϕ 1.001.5 ±0.050.100 ±0.025Die SolderBumps3 x 0.070.57 ±0.10.57 ±0.1Units = MillimetersPk 60 Sid TIntel ® 82865G/82865GV GMCH Datasheet 209
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Intel ® 865G/865GV ChipsetDatashee
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Contents1 Introduction.............
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3.8 PCI-to-CSA Bridge Registers (De
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5.5.3 Synchronous Display .........
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Tables1 General Terminology .......
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Introduction1.4 Intel ® 82865G GMC
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Introduction1.4.7 Display Interface
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Signal Description2.1 Host Interfac
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Signal DescriptionSignal Name Type
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Signal Description2.2.2 DDR SDRAM C
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Signal Description2.5 AGP Interface
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Signal Description2.5.4 AGP Strobes
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Signal DescriptionSignal Name Type
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Signal Description2.5.7 Intel ® DV
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Signal Description2.7 Clocks, Reset
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Signal Description2.10 GMCH Sequenc
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Signal Description2.12 Full and War
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Register DescriptionTermReservedReg
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Register Description3.3 Routing Con
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Register DescriptionIf the Bus Numb
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Register Description3.4.2 CONFIG_DA
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Register DescriptionTable 6.DRAM Co
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Register Description3.5.3 PCICMD—
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Register Description3.5.5 RID—Rev
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Register Description3.5.10 APBASE
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Register Description3.5.14 AGPM—A
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Register DescriptionNotes on Pre-Al
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Register Description3.5.17 FPLLCONT
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Register DescriptionAs an example,
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Register Description3.5.20 SMRAM—
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Register Description3.5.22 ACAPID
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Register Description3.5.24 AGPCMD
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Register Description3.5.26 APSIZE
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Register Description3.5.29 LPTT—A
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Register Description3.5.31 GMCHCFG
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Register Description3.5.32 ERRSTS
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Register Description3.5.34 SKPD—S
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Register Description3.6.1 VID1—Ve
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Register Description3.6.4 PCISTS1
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Register Description3.6.8 MLT1—Ma
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Register Description3.6.14 IOBASE1
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Register Description3.6.17 MBASE1
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Register Description3.6.22 ERRCMD1
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Register Description3.7.6 CC—Clas
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Register Description3.7.11 MMADR—
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Register Description3.7.16 CAPPOINT
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Register Description3.7.22 PMCAP—
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Register Description3.8 PCI-to-CSA
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Register Description3.8.3 PCICMD3
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Register Description3.8.5 RID3—Re
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Register Description3.8.11 SBUSN3
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Register Description3.8.15 SSTS3—
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Register Description3.8.17 MLIMIT3
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Register Description3.8.20 BCTRL3
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Register Description3.9 Overflow Co
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Register Description3.9.4 PCISTS6
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Register Description3.9.9 BAR6—Me
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Register DescriptionThe remaining 7
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Register Description3.10.3 DRT—DR
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Register DescriptionBit6:4Descripti
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System Address MapSystem Address Ma
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System Address Map4.2 Compatibility
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System Address Map4.3 Extended Memo
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System Address MapPCI Memory Addres
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Functional DescriptionFunctional De
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Functional Description5.2 System Me
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Functional Description5.2.2.1 Dynam
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Functional DescriptionTable 21. DRA
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Functional DescriptionTable 23. DRA
Page 157 and 158: Functional Description5.2.6 Configu
Page 159 and 160: Functional Description5.3.1 GMCH AG
Page 161 and 162: Functional Descriptiondown controll
Page 163 and 164: Functional Description5.3.6 Support
Page 165 and 166: Functional Description5.4.1 3D Engi
Page 167 and 168: Functional DescriptionTexture Forma
Page 169 and 170: Functional DescriptionTexture Map B
Page 171 and 172: Functional DescriptionDepth BufferT
Page 173 and 174: Functional Description5.4.3 Video E
Page 175 and 176: Functional Description5.4.5 PipesSc
Page 177 and 178: Functional DescriptionIntegrated RA
Page 179 and 180: Functional DescriptionDirect YUV fr
Page 181 and 182: Functional Description• System—
Page 183 and 184: Functional Description5.8 ClockingT
Page 185 and 186: Electrical CharacteristicsElectrica
Page 187 and 188: Electrical CharacteristicsTable 36.
Page 189 and 190: Electrical Characteristics6.5 DC Pa
Page 195 and 196: Electrical Characteristics6.6.3 DAC
Page 197 and 198: Ballout and Package InformationBall
Page 199 and 200: Ballout and Package InformationFigu
Page 201 and 202: Ballout and Package InformationTabl
Page 207: Ballout and Package InformationTabl
Page 211 and 212: TestabilityTestability 8In the GMCH
Page 213 and 214: Testability8.2 XOR Chain Definition
Page 215 and 216: TestabilityTable 45. XOR Chain 1 (3
Page 221 and 222: Intel ® 82865GV GMCHIntel ® 82865
Page 223 and 224: Intel ® 82865GV GMCH9.3 Intel ® 8
Page 225 and 226: Intel ® 82865GV GMCHGMCHCFG—GMCH
Page 227 and 228: Intel ® 82865GV GMCH BalloutIntel
Page 229 and 230: Intel ® 82865GV GMCH BalloutFigure
Page 231 and 232: Intel ® 82865GV GMCH BalloutTable
Page 241 and 242: Intel ® 82865GV GMCH TestabilityIn
Page 243 and 244: Intel ® 82865GV GMCH Testability11
Page 245 and 246: Intel ® 82865GV GMCH TestabilityTa
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IntelÂ® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

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