Intel® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

Functional Description5.4.5 PipesScaling Filter and ControlThe scaling filter has three vertical taps and five horizontal taps. Arbitrary scaling (per pixelgranularity) for any video source (YUV422 or YUV420) format is supported.The overlay logic can scale an input image up to 1600X1200 with no major degradation in the filterused as long as the maximum frequency limitation is met. Display resolution and refresh ratecombinations, where the dot clock is greater than the maximum frequency, require the overlay touse pixel replication.The display consists of a single pipe. The pipe can operate in a single-wide or “double-wide” modeat 2X graphics core clock though, it is effectively limited by its display port (350 MHz maximum).The primary display plane and the cursor plane provides a “double wide” mode to feed the pipe.Clock Generator Units (DPLL)The clock generator units provide a stable frequency for driving display devices. It operates byconverting an input reference frequency into an output frequency. The timing generators take theirinput from internal DPLL devices that are programmable to generate pixel clocks in the range of25–350 MHz. Accuracy for VESA timing modes is required to be within ± 0.5%.The DPLL can take a reference frequency from the external reference input (e.g., DREFCLK) forthe TV clock input (DVOBC_CLKIN).5.5 Display InterfacesThe GMCH has three display ports; one analog and two digital. Each port can transmit dataaccording to one or more protocols. The digital ports are connected to an external device thatconverts one protocol to another. Examples of this are TV encoders, external DACs, LVDStransmitters, and TMDS transmitters. Each display port has control signals that may be used tocontrol, configure, and/or determine the capabilities of an external device.The GMCH has one dedicated display port, the analog port. DVO B and DVO C are multiplexedwith the AGP interface and are not available if an external AGP graphics device is in use. When asystem uses an AGP connector, DVO ports B and C can be used via an ADD (AGP DigitalDisplay) card. Ports B and C can also operate in dual-channel mode, where the data bus isconnected to both display ports, allowing a single device to take data at twice the pixel rate.The GMCH’s analog port uses an integrated 350 MHz RAMDAC that can directly drive a standardprogressive scan analog monitor up to a resolution of 2048x1536 pixels with 32-bit color at 75 Hz.The GMCH’s DVO ports are each capable of driving a 165 MHz pixel clock. Each port is capableof driving a digital display up to 1600x1200 @ 60Hz. When in dual-channel mode, the GMCH candrive a flat panel up to 2048x1536 @ 60Hz or dCRT/HDTV up to 1920x1080 @ 85Hz.The GMCH is compliant with Digital Visual Interface (DVI) Specification, Revision 1.0. Whencombined with a DVI compliant external device and connector, the GMCH has a high-speedinterface to a digital display (e.g., flat panel or digital CRT).Intel ® 82865G/82865GV GMCH Datasheet 175