Intel® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

Register Description3.5.32 ERRSTS—Error Status Register (Device 0)Address Offset:Default Value:Access:Size:C8–C9h0000hR/WC16 bitsThis register is used to report various error conditions via the SERR HI messaging mechanism. ASERR HI message is generated on a 0-to-1 transition of any of these flags (if enabled by theERRCMD and PCICMD registers). These bits are set regardless of whether or not the SERR isenabled and generated.Note:Software must write a 1 to clear bits that are set.BitDescriptions15:10 Reserved9Non-DRAM Lock Error (NDLOCK)—R/WC.0 = No Lock operation detected.1 = GMCH has detected a lock operation to memory space that did not map into SDRAM.Software Generated SMI Flag—R/WC.8 0 = Source of an SMI was not the Device 2 Software SMI Trigger.1 = Source of an SMI was the Device 2 Software SMI Trigger.7:6 Reserved5432GMCH Detects Unimplemented HI Special Cycle (HIAUSC)—R/WC.0 = No unimplemented Special Cycle on HI detected.1 = GMCH detects an Unimplemented Special Cycle on HI.AGP Access Outside of Graphics Aperture Flag (OOGF)—R/WC.0 = No AGP access outside of the graphics aperture range.1 = AGP access occurred to an address that is outside of the graphics aperture range.Invalid AGP Access Flag (IAAF)—R/WC.0 = No invalid AGP Access Flag.1 = AGP access was attempted outside of the graphics aperture and either to the 640 KB – 1 MBrange or above the top of memory.Invalid Graphics Aperture Translation Table Entry (ITTEF)—R/WC.0 = No Invalid Graphics Aperture Translation Table Entry.1 = Invalid translation table entry was returned in response to an AGP access to the graphicsaperture.GMCH Detects Unsupported AGP Command—R/WC.1 0 = No unsupported AGP Command received.1 = Bogus or unsupported command is received by the AGP target in the GMCH.0 Reserved84 Intel ® 82865G/82865GV GMCH Datasheet