IntelÂ® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

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TestabilityTable 54. XOR Excluded PinsSignal Name Ball Number Signal Name Ball NumberBLUE H7 SDM_A0 AP12BLUE# G6 SDM_A1 AP16BPRI# B26 SDM_A2 AM24BREQ0# B24 SDM_A3 AP30CPURST# E8 SDM_A4 AF31DEFER# L21 SDM_A5 W33DREFCLK G4 SDM_A6 M34GCLKIN H4 SDM_A7 H32GRCOMP AC2 SDM_B0 AG11GREEN H6 SDM_B1 AG15GREEN# G5 SDM_B2 AE21GVREF AD2 SDM_B3 AJ28GVSWING AC3 SDM_B4 AC31HCLKN C7 SDM_B5 U31HCLKP B7 SDM_B6 M29HDRCOMP E24 SDM_B7 J31HDSWING C25 SMVREF_A0 E34HDVREF F23 SMVREF_B0 AP9HTRDY# D24 SMXRCOMP AK9HI_COMP AD4 SMXRCOMPVOH AN9HI_VREF AE2 SMXRCOMPVOL AL9HI_SWING AE3 SMYRCOMP AA33PWROK AE14 SMYRCOMPVOH R34RED F4 SMYRCOMPVOL R33RED# E4 Reserved AG9REFSET D2 TESTIN# AG10RS0# G22 CI_RCOMP AG2RS1# C27 CI_VREF AF4RS2# B27 CI_VSWING AF2RSTIN#AK4220 Intel ® 82865G/82865GV GMCH Datasheet
Intel ® 82865GV GMCHIntel ® 82865GV GMCH 9Chapter 1 through Chapter 8 of this datasheet described the 82865G component. The first 8chapters also apply to the 82865GV, with the differences noted in this chapter. This chapterdescribes the differences between the 82865G and the 82865GV components. Figure 22 shows anexample block diagram of an 865GV chipset-based platform.The information in Chapter 9 through Chapter 11apply to the 82865GV component, unlessotherwise noted.Figure 22. Intel ® 865GV Chipset System Block DiagramProcessorVGA2 DVO ports2.1 GB/s400/533/800 MHzFSBIntel ® 865GV ChipsetIntel ® 82865GV GMCHChannel A2.1 GB/sup to3.2 GB/sSystem MemoryDDRDDRCSA Interf aceGigabit Ethernet266 MB/s266 MB/sHI 1.5Channel B2.1 GB/sup to3.2 GB/sDDRDDRUSB 2.08 ports, 480 Mb/sGPIO2 Serial ATA Ports150 MB/sIntel ® 82801EBICH5orIntel ® 82801ER ICH5RPow er ManagementClock GenerationLAN Connect/ASFSystemManagement (TCO)2 ATA 100 PortsSMBus 2.0/I 2 CAC '973 CODEC supportPCI BusSix PCI MastersFlashBIOSLPCInterfaceSIOSys BlkIntel ® 82865G/82865GV GMCH Datasheet 221
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Intel ® 865G/865GV ChipsetDatashee
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Contents1 Introduction.............
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3.8 PCI-to-CSA Bridge Registers (De
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5.5.3 Synchronous Display .........
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Tables1 General Terminology .......
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Introduction1.4 Intel ® 82865G GMC
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Introduction1.4.7 Display Interface
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Signal Description2.1 Host Interfac
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Signal DescriptionSignal Name Type
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Signal Description2.2.2 DDR SDRAM C
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Signal Description2.5 AGP Interface
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Signal Description2.5.4 AGP Strobes
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Signal DescriptionSignal Name Type
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Signal Description2.5.7 Intel ® DV
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Signal Description2.7 Clocks, Reset
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Signal Description2.10 GMCH Sequenc
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Signal Description2.12 Full and War
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Register DescriptionTermReservedReg
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Register Description3.3 Routing Con
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Register DescriptionIf the Bus Numb
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Register Description3.4.2 CONFIG_DA
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Register DescriptionTable 6.DRAM Co
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Register Description3.5.3 PCICMD—
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Register Description3.5.5 RID—Rev
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Register Description3.5.10 APBASE
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Register Description3.5.14 AGPM—A
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Register DescriptionNotes on Pre-Al
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Register Description3.5.17 FPLLCONT
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Register DescriptionAs an example,
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Register Description3.5.20 SMRAM—
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Register Description3.5.22 ACAPID
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Register Description3.5.24 AGPCMD
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Register Description3.5.26 APSIZE
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Register Description3.5.29 LPTT—A
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Register Description3.5.31 GMCHCFG
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Register Description3.5.32 ERRSTS
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Register Description3.5.34 SKPD—S
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Register Description3.6.1 VID1—Ve
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Register Description3.6.4 PCISTS1
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Register Description3.6.8 MLT1—Ma
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Register Description3.6.14 IOBASE1
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Register Description3.6.17 MBASE1
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Register Description3.6.22 ERRCMD1
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Register Description3.7.6 CC—Clas
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Register Description3.7.11 MMADR—
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Register Description3.7.16 CAPPOINT
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Register Description3.7.22 PMCAP—
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Register Description3.8 PCI-to-CSA
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Register Description3.8.3 PCICMD3
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Register Description3.8.5 RID3—Re
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Register Description3.8.11 SBUSN3
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Register Description3.8.15 SSTS3—
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Register Description3.8.17 MLIMIT3
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Register Description3.8.20 BCTRL3
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Register Description3.9 Overflow Co
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Register Description3.9.4 PCISTS6
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Register Description3.9.9 BAR6—Me
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Register DescriptionThe remaining 7
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Register Description3.10.3 DRT—DR
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Register DescriptionBit6:4Descripti
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System Address MapSystem Address Ma
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System Address Map4.2 Compatibility
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System Address Map4.3 Extended Memo
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System Address MapPCI Memory Addres
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Functional DescriptionFunctional De
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Functional Description5.2 System Me
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Functional Description5.2.2.1 Dynam
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Functional DescriptionTable 21. DRA
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Functional DescriptionTable 23. DRA
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Functional Description5.2.6 Configu
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Functional Description5.3.1 GMCH AG
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Functional Descriptiondown controll
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Functional Description5.3.6 Support
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Functional Description5.4.1 3D Engi
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Functional DescriptionTexture Forma
Page 169 and 170: Functional DescriptionTexture Map B
Page 171 and 172: Functional DescriptionDepth BufferT
Page 173 and 174: Functional Description5.4.3 Video E
Page 175 and 176: Functional Description5.4.5 PipesSc
Page 177 and 178: Functional DescriptionIntegrated RA
Page 179 and 180: Functional DescriptionDirect YUV fr
Page 181 and 182: Functional Description• System—
Page 183 and 184: Functional Description5.8 ClockingT
Page 185 and 186: Electrical CharacteristicsElectrica
Page 187 and 188: Electrical CharacteristicsTable 36.
Page 189 and 190: Electrical Characteristics6.5 DC Pa
Page 195 and 196: Electrical Characteristics6.6.3 DAC
Page 197 and 198: Ballout and Package InformationBall
Page 199 and 200: Ballout and Package InformationFigu
Page 201 and 202: Ballout and Package InformationTabl
Page 209 and 210: Ballout and Package Information7.2
Page 211 and 212: TestabilityTestability 8In the GMCH
Page 213 and 214: Testability8.2 XOR Chain Definition
Page 215 and 216: TestabilityTable 45. XOR Chain 1 (3
Page 217 and 218: TestabilityTable 49. XOR Chain 5 (4
Page 219: TestabilityTable 53. XOR Chain 9 (6
Page 223 and 224: Intel ® 82865GV GMCH9.3 Intel ® 8
Page 225 and 226: Intel ® 82865GV GMCHGMCHCFG—GMCH
Page 227 and 228: Intel ® 82865GV GMCH BalloutIntel
Page 229 and 230: Intel ® 82865GV GMCH BalloutFigure
Page 231 and 232: Intel ® 82865GV GMCH BalloutTable
Page 241 and 242: Intel ® 82865GV GMCH TestabilityIn
Page 243 and 244: Intel ® 82865GV GMCH Testability11
Page 245 and 246: Intel ® 82865GV GMCH TestabilityTa
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IntelÂ® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

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