Intel® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

Electrical CharacteristicsTable 36. Signal Groups (Sheet 1 of 2)SignalGroupSignal Type Signals Notes 1AGP Interface Signal Groups (only AGP 3.0 naming convention listed)(a)AGP I/OGADSTBF[1:0], GADSTBS[1:0], GFRAME, GIRDY,GTRDY, GSTOP, GDEVSEL, GAD[31:0], GCBE[3:0],GPAR/ADD_DETECT, DBI_HI, DBI_LO(b) AGP InputGSBA[7:0]#, GRBF, GWBF, GSBSTBF, GSBSTBS,GREQ(c) AGP Output GST[2:0], GGNT(d) AGP Miscellaneous GVREF, GRCOMP/DVOBCRCOMP, GVSWINGHub Interface Signal Groups(e) HI15 I/O HI[10:0], HISTRS, HISTRF(f)Hub InterfaceMiscellaneousHI_SWING, HI_VREF, HI_RCOMPCSA Interface Signal Groups(e) HI15 I/O CI[10:0], CISTRS, CISTRF(f)CSA InterfaceMiscellaneousCI_SWING, CI_VREF, CI_RCOMPHost Interface Signal Groups(g)AGTL+ I/OADS#, BNR#, DBSY#, DINV[3:0]#, DRDY#, HA[31:3]#,HADSTB[1:0] #, HD[63:0]#,HDSTBP[3:0]#,HDSTBN[3:0]#, HIT#, HITM#, HREQ[4:0]#, PROCHOT#(h) AGTL+ Input HLOCK#(i) AGTL+ OutputBPRI#, BREQ0#, CPURST#, DEFER#, HTRDY#,RS[2:0]#(j) CMOS Host Clock Input HCLKP, HCLKN(k) Host Miscellaneous HDVREF[2:0], HDRCOMP, HDSWINGDDR Interface Signal Groups(l) DDR SSTL_2 I/O SDQ_A[63:0], SDQ_B[63:0], SDQS_A[7:0], SDQS_B[7:0](m)DDR SSTL_2 OutputSDM_A[7:0], SDM_B[7:0], SCMDCLK_A[5:0],SCMDCLK_B[5:0], SCMDCLK_A[5:0]#,SCMDCLK_B[5:0]#, SMAA_A[12:0], SMAA_B[12:0],SMAB_A[5:1], SMAB_B[5:1], SBA_A[1:0], SBA_B[1:0],SRAS_A#, SRAS_B#, SCAS_A#, SCAS_B#, SWE_A#,SWE_B#, SCS_A[3:0]#, SCS_B[3:0]#, SCKE_A[3:0],SCKE_B[3:0](v) DDR RCOMP SMXRCOMP, SMYRCOMP(n) DDR Miscellaneous 2 SMXRCOMPVOL, SMXRCOMPVOH, SMYRCOMPVOL,SMYRCOMPVOH, SMVREF_A, SMVREF_BIntel ® 82865G/82865GV GMCH Datasheet 187