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Intel® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

Intel® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

Intel® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

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Register Description3.5.30 TOUD—Top of Used DRAM Register (Device 0)Address Offset:Default Value:Access:Size:C4–C5h0400hRO, R/W16 bitsBit15:3DescriptionsTop of Usable DRAM (TOUD)—R/W. This register contains bits 31:19 of the maximum systemmemory address that is usable by the operating system. Address bits 31:19 imply a memorygranularity of 512 KB. Configuration software should set this value to either the maximum amountof usable memory (minus TSEG, graphics stolen memory, and CSA stolen memory) in the systemor to the minimum address allocated for PCI memory or the graphics aperture (minus TSEG,graphics stolen memory), whichever is smaller. Address bits 18:0 are assumed to be 0000h for thepurposes of address comparison.This register must be set to at least 0400h for a minimum of 64 MB of system memory. To calculatethe value of TOUD, configuration software should set this value to the smaller of the following 2cases:• The maximum amount of usable memory in the system minus optional TSEG, optionalgraphics stolen memory.• The address allocated for PCI memory or the graphics aperture minus optional TSEG,optional graphics stolen memory.Programming Example:• DRB7 is set to 4 GB.• TSEG is enabled and TSEG size is set to 1 MB.• Internal Graphics is enabled and Graphics Mode Select is set to 32 MB.• BIOS knows the OS requires 1 GB of PCI space.• BIOS also knows the range from FEC0_0000h to FFFF_FFFFh is not usable by thesystem. This 20-MB range at the very top of addressable memory space is lost to APIC.According to the above equation, TOUD is originally calculated to:• 4 GB (DRB7) – 1 MB (TSEG) – 32 MB (graphics) = FDF0_0000hThe system memory requirements are:• 4 GB (max addressable space) – 1 GB (PCI space) – 33 MB (TSEG, graphics)– 20 MB (lost memory) = BCB0_0000hSince BCB0_0000h (PCI and other system memory requirements) is less than FDF0_0000h,TOUD should be programmed to BCB0_0000h.NOTE: Even if the OS does not need any PCI space, TOUD should never be programmed aboveFEC0_0000h. If TOUD is programmed above this, address ranges that are reserved willbecome accessible to applications.2:0 Reserved.<strong>Intel</strong> ® 82<strong>865G</strong>/82<strong>865G</strong>V GMCH <strong>Datasheet</strong> 81

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