Intel® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

Signal Description2.5.7 Intel ® DVO-to-AGP Pin MappingThe GMCH multiplexes an ADD_DETECT signal with the GPAR signal on the AGP bus. Thissignal acts as a strap and indicates whether the interface is in AGP or DVO mode(See ADD_DETECT signal description for further information). GSBA(7:0) act as straps for anADD_ID. When an ADD card is present, ADD_DETECT = 0 (DVO mode), the ADD_ID register(offset 71408h) will hold a valid ADD PROM ID.Table 3 shows the DVO-to-AGP pin mapping. The AGP signal name column only shows the AGP2.0 signal names.Table 3.Intel ® DVO-to-AGP Pin MappingDVO Signal Name AGP Signal Name DVO Signal Name AGP Signal NameDVOB_D0 GAD3 DVOC_D0 GAD19DVOB_D1 GAD2 DVOC_D1 GAD20DVOB_D2 GAD5 DVOC_D2 GAD21DVOB_D3 GAD4 DVOC_D3 GAD22DVOB_D4 GAD7 DVOC_D4 GAD23DVOB_D5 GAD6 DVOC_D5 GC/BE3#DVOB_D6 GAD8 DVOC_D6 GAD25DVOB_D7 GC/BE0# DVOC_D7 GAD24DVOB_D8 GAD10 DVOC_D8 GAD27DVOB_D9 GAD9 DVOC_D9 GAD26DVOB_D10 GAD12 DVOC_D10 GAD29DVOB_D11 GAD11 DVOC_D11 GAD28DVOB_CLK GADSTB0 DVOC_CLK GADSTB1DVOB_CLK# GADSTB0# DVOC_CLK# GADSTB1#DVOB_HSYNC GAD0 DVOC_HSYNC GAD17DVOB_VSYNC GAD1 DVOC_VSYNC GAD16DVOB_BLANK# GC/BE1# DVOC_BLANK# GAD18DVOBC_CLKINT GAD13 DVOBC_INTR# GAD30DVOB_FLDSTL GAD14 DVOC_FLDSTL GAD31DVOBCRCOMP AGP_RCOMP ADDID[7:0] GSBA[7:0]MI2CCLK GIRDY# MDVI_DATA GFRAME#MI2CDATA GDEVSEL# MDDC_CLK GSTOP#MDVI_CLK GTRDY# MDDC_DATA GAD15Intel ® 82865G/82865GV GMCH Datasheet 39