Intel® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

Register Description3.5.29 LPTT—AGP Low Priority Transaction Timer Register(Device 0)Address Offset:Default Value:Access:Size:BDh10hRO, R/W8 bitsLPTT is an 8-bit register similar in function to AMTT. This register is used to control the minimumtenure on the AGP for low priority data transaction (both reads and writes) issued using PIPE# orSB mechanisms.The number of clocks programmed in the LPTT represents the guaranteed time slice (measured in66 MHz clocks) allotted to the current low priority AGP transaction data transfer state. This doesnot necessarily apply to a single transaction but it can span over multiple low-priority transactionsof the same type. After this time expires, the AGP arbiter may grant the bus to another agent ifthere is a pending request. The LPTT does not apply in the case of high-priority request whereownership is transferred directly to high-priority requesting queue. The default value of LPTT is00h and disables this function. The LPTT value can be programmed with 8-clock granularity. Forexample, if the LPTT is programmed to 10h, the selected value corresponds to the time period of16 AGP (66 MHz) clocks.Bit7:3DescriptionsLow Priority Transaction Timer Count Value (LPTTC)—R/W. The number of clocksprogrammed in these bits represents the time slice (measured in eight 66 MHz clock granularity)allotted to the current low priority AGP transaction data transfer state.2:0 Reserved.80 Intel ® 82865G/82865GV GMCH Datasheet