- Page 1 and 2: Intel ® 865G/865GV ChipsetDatashee
- Page 3: Contents1 Introduction.............
- Page 6 and 7: 3.8 PCI-to-CSA Bridge Registers (De
- Page 8 and 9: 5.5.3 Synchronous Display .........
- Page 10 and 11: Tables1 General Terminology .......
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- Page 20 and 21: Introduction1.4 Intel ® 82865G GMC
- Page 26 and 27: Signal DescriptionFigure 2. Intel
- Page 28 and 29: Signal DescriptionSignal Name Type
- Page 30 and 31: Signal Description2.2 Memory Interf
- Page 32 and 33: Signal Description2.3 Hub Interface
- Page 34 and 35: Signal Description2.5.2 AGP Flow Co
- Page 36 and 37: Signal Description2.5.5 PCI Signals
- Page 38 and 39: Signal DescriptionSignal Name Type
- Page 40 and 41: Signal Description2.6 Analog Displa
- Page 42: Signal Description2.8 RCOMP, VREF,
- Page 45 and 46: Signal Description2.11 Signals Used
- Page 47 and 48: Register DescriptionRegister Descri
- Page 49 and 50: Register DescriptionTable 4 shows t
- Page 51 and 52: Register DescriptionCycle. A[1:0] o
- Page 53 and 54: Register Description3.4.1 CONFIG_AD
- Page 55 and 56: Register Description3.5 DRAM Contro
- Page 57 and 58: Register Description3.5.1 VID—Ven
- Page 59 and 60: Register Description3.5.4 PCISTS—
- Page 61 and 62: Register Description3.5.8 MLT—Mas
- Page 63 and 64: Register Description3.5.11 SVID—S
- Page 65 and 66: Register Description3.5.15 GC—Gra
- Page 67 and 68: Register DescriptionELSE defaults t
- Page 69 and 70: Register Description3.5.18 PAM[0:6]
- Page 71 and 72: Register DescriptionFor details on
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Register Description3.5.21 ESMRAMC
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Register DescriptionBit432:0Descrip
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Register Description3.5.25 AGPCTRL
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Register Description3.5.28 AMTT—A
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Register Description3.5.30 TOUD—T
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Register DescriptionBit3Description
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Register Description3.5.33 ERRCMD
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Register Description3.6 PCI-to-AGP
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Register Description3.6.3 PCICMD1
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Register Description3.6.5 RID1—Re
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Register Description3.6.11 SBUSN1
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Register Description3.6.16 SSTS1—
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Register Description3.6.18 MLIMIT1
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Register Description3.7.4 PCISTS2
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Register Description3.7.9 HDR2—He
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Register Description3.7.13 SVID2—
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Register Description3.7.19 MINGNT
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Register Description3.7.24 SWSMI—
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Register Description3.8.1 VID3—Ve
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Register Description3.8.4 PCISTS3
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Register Description3.8.8 MLT3—Ma
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Register Description3.8.13 IOBASE3
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Register Description3.8.16 MBASE3
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Register Description3.8.18 PMBASE3
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Register Description3.8.21 ERRCMD3
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Register Description3.9.2 DID6—De
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Register Description3.9.6 SUBC6—S
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Register Description3.10 Device 6 M
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Register Description3.10.2 DRA—DR
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Register Description3.10.4 DRC—DR
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Register DescriptionThis page is in
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System Address MapFigure 9. Memory
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System Address MapDOS Area (00000h-
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System Address Map4.3.2 Pre-Allocat
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System Address Map4.4 AGP Memory Ad
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Functional DescriptionWhen the proc
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Functional Description5.2.1 DRAM Te
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Functional DescriptionTable 19. DRA
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Functional DescriptionTable 22. DRA
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Functional DescriptionTable 24. RAM
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Functional DescriptionTable 26 is o
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Functional DescriptionTable 28. AGP
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Functional Description5.3.4 AGP Tar
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Functional Description5.4 Integrate
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Functional DescriptionDepth-BiasThe
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Functional Description6. Linear MIP
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Functional Descriptionthe color of
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Functional Description5.4.2 2D Engi
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Functional Description5.4.4.2 Overl
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Functional DescriptionTable 32. Dis
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Functional Description5.5.2.1.1 ADD
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Functional Description5.5.2.1.7 Int
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Functional DescriptionNote:The use
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Functional DescriptionThis page is
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Electrical Characteristics6.3 Power
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Electrical CharacteristicsTable 36.
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Electrical CharacteristicsTable 37.
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Electrical CharacteristicsTable 38.
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Electrical Characteristics6.6 DACTh
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Electrical CharacteristicsThis page
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Ballout and Package InformationFigu
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Ballout and Package InformationThis
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Ballout and Package InformationTabl
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Ballout and Package InformationTabl
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Ballout and Package InformationTabl
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Ballout and Package InformationTabl
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Ballout and Package InformationFigu
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TestabilityFigure 21. XOR Testing C
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TestabilityTable 44. XOR Chain 0 (6
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TestabilityTable 47. XOR Chain 3 (4
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TestabilityTable 51. XOR Chain 7 (4
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TestabilityTable 54. XOR Excluded P
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Intel ® 82865GV GMCH9.1 No AGP Int
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Intel ® 82865GV GMCHATTBASE — Ap
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Intel ® 82865GV GMCHCAPREG—Capab
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Intel ® 82865GV GMCH BalloutFigure
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Intel ® 82865GV GMCH BalloutThis p
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Intel ® 82865GV GMCH BalloutTable
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Intel ® 82865GV GMCH BalloutTable
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Intel ® 82865GV GMCH BalloutTable
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Intel ® 82865GV GMCH BalloutTable
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Intel ® 82865GV GMCH BalloutThis p
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Intel ® 82865GV GMCH TestabilityFi
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Intel ® 82865GV GMCH TestabilityTa
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Intel ® 82865GV GMCH TestabilityTa
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Intel ® 82865GV GMCH TestabilityTa
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Intel ® 82865GV GMCH TestabilityTa