Intel® 865G/865GV Chipset Datasheet - download.intel.nl - Intel

System Address Map4.3.2 Pre-Allocated MemoryVoids of physical addresses that are not accessible as general system memory and reside within thesystem memory address range (< TOSM) are created for SMM-mode and legacy VGA graphicscompatibility. For VGA graphics compatibility, pre-allocated memory is only required in non-localmemory configurations. It is the responsibility of BIOS to properly initialize these regions.Table 16 details the location and attributes of the regions. Enabling/Disabling these ranges aredescribed in the GMCH Control (GC) Register in Device 0.Table 16. Pre-Allocated MemoryMemory Segments Attributes Comments00000000h–03E7FFFFh R/W Available System Memory 62.5 MB03E80000h–03EFFFFFh SMM Mode Only - processor Reads TSEG Address Range03E80000h–03EFFFFFh SMM Mode Only - processor Reads TSEG Pre-allocated Memory03F00000h– 03FFFFFFhR/WPre-allocated Graphics VGA memory.1 MB (or 512 K or 8 MB) when IGD isenabled.Extended SMRAM Address Range (HSEG and TSEG)The HSEG and TSEG SMM transaction address spaces reside in this extended memory area.HSEGSMM-mode processor accesses to enabled HSEG are remapped to 000A0000h–000BFFFFh. Non-SMM-mode processor accesses to enabled HSEG are considered invalid and are terminatedimmediately on the FSB. The exceptions to this rule are Non-SMM-mode write back cycles thatare remapped to SMM space to maintain cache coherency. AGP and HI originated cycles toenabled SMM space are not allowed. Physical SDRAM behind the HSEG transaction address isnot remapped and is not accessible.TSEGTSEG can be up to 1 MB in size and is the first block after the top of usable physical memory.SMM-mode processor accesses to enabled TSEG access the physical SDRAM at the same address.Non-SMM-mode processor accesses to enabled TSEG are considered invalid and are terminatedimmediately on the FSB. The exceptions to this rule are Non-SMM-mode write back cycles thatare directed to the physical SMM space to maintain cache coherency. AGP and HI originatedcycles to enabled SMM space are not allowed.The size of the SMRAM space is determined by the USMM value in the SMRAM register. Whenthe extended SMRAM space is enabled, non-SMM processor accesses and all other accesses in thisrange are forwarded to the hub interface. When SMM is enabled, the amount of memory availableto the system is equal to the amount of physical SDRAM minus the value in the TSEG register.144 Intel ® 82865G/82865GV GMCH Datasheet