Xilinx UG194 Virtex-5 FPGA Embedded Tri-Mode Ethernet MAC ...
Xilinx UG194 Virtex-5 FPGA Embedded Tri-Mode Ethernet MAC ...
Xilinx UG194 Virtex-5 FPGA Embedded Tri-Mode Ethernet MAC ...
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Generic<br />
Host Bus<br />
DCR Bus<br />
R<br />
PHYE<strong>MAC</strong>#MCLKIN<br />
E<strong>MAC</strong>#PHYMCLKOUT<br />
PHYE<strong>MAC</strong>#MDIN<br />
E<strong>MAC</strong>#PHYMDOUT<br />
E<strong>MAC</strong>#PHYMDTRI<br />
MDIO Implementation in the <strong>Ethernet</strong> <strong>MAC</strong><br />
Figure 5-5: MDIO Access to External PHY<br />
Connect to<br />
External PHY<br />
Accessing PCS/PMA Sublayer Management Registers using MDIO<br />
Host<br />
Interface<br />
DCR Bridge<br />
Figure 5-6 shows the functional block diagram of the <strong>Ethernet</strong> <strong>MAC</strong> with the PCS<br />
management register, MDIO intersection, and MDIO master blocks highlighted. This<br />
figure shows that the PCS/PMA sublayer registers can still be accessed via MDIO when<br />
the host interface is not in use.<br />
E<strong>MAC</strong>#<br />
TX<br />
RX<br />
16- or 8-Bit Client Interface<br />
<strong>Ethernet</strong> <strong>MAC</strong><br />
Transmit Engine<br />
Flow Control<br />
Receive Engine<br />
Address Filter<br />
Registers<br />
MDIO Interface<br />
<strong>MAC</strong> Configuration<br />
Registers<br />
TX RX<br />
Statistics<br />
TE<strong>MAC</strong> User Guide www.xilinx.com 121<br />
<strong>UG194</strong> (v1.10) February 14, 2011<br />
GND<br />
I<br />
O<br />
I<br />
T<br />
OBUF<br />
O<br />
IOBUF<br />
Clock Management<br />
OPAD<br />
MDC<br />
IOPAD MDIO<br />
IO<br />
<strong>UG194</strong>_5_05_072306<br />
MII/GMII/RGMII<br />
Interface to<br />
External PHY<br />
GTP/GTX Transceiver<br />
Interface<br />
Figure 5-6: Accessing PCS/PMA Sublayer Management Registers in the <strong>Ethernet</strong> <strong>MAC</strong><br />
MII/GMII/RGMII Interface<br />
TX<br />
RX<br />
TX<br />
RX<br />
PCS/PMA Sublayer<br />
PCS Management<br />
Registers<br />
MDIO Intersection<br />
MDIO<br />
Master<br />
<strong>UG194</strong>_5_06_071709