Xilinx UG194 Virtex-5 FPGA Embedded Tri-Mode Ethernet MAC ...

Chapter 6: Physical Interface
Media Independent Interface (MII)
The Media Independent Interface (MII), defined in IEEE 802.3, clause 22, is a parallel
interface that connects a 10-Mb/s and/or 100-Mb/s capable MAC to the physical
sublayers.
Figure 6-2 shows the Ethernet MAC configured for MII. The physical signals of the
Ethernet MAC are connected through IOBs to the external interface. The “logic cloud”
indicates that alternative implementations are possible.
Ethernet
MAC
Figure 6-2: Ethernet MAC Configured in MII Mode
There are two alternative implementations available that use different clocking schemes:
the standard clocking scheme without clock enables or an alternative clock enable scheme
that saves on global clock resources. “Ethernet MAC Clocks,” page 205 introduces these
two clocking models, which are described in detail in the following sections:
“MII Standard Clock Management”
Virtex-5 Device
IOBs
and
Clock Logic
MII_RX_CLK
MII_RXD[3:0]
MII_RX_DV
MII_RX_ER
MII_TX_CLK
MII_TXD[3:0]
MII_TX_EN
MII_TX_ER
MII_COL
MII_CRS
“MII Clock Management using Clock Enables”
If the CORE Generator tool is used, the wrapper files for the Ethernet MAC that are created
will contain the logic described in these sections. By using the CORE Generator tool, the
time required to instantiate the Ethernet MAC into a usable design is greatly reduced. See
“Accessing the Ethernet MAC from the CORE Generator Tool,” page 25.
140 www.xilinx.com TEMAC User Guide
UG194 (v1.10) February 14, 2011
MII Physical Interface
UG194_6_02_072106
R