Xilinx UG194 Virtex-5 FPGA Embedded Tri-Mode Ethernet MAC ...

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Address Filtering
Address Filtering
The address filtering block accepts or rejects frames by examining the destination address
of an incoming frame. This block includes:
Matching of programmable unicast destination address
Matching of four additional programmable general addresses
Broadcast address recognition (0xFFFF_FFFF_FFFF)
Optional pass-through mode with address filter disabled (promiscuous mode)
Pause control frame address recognition (0x0100_00C2_8001)
The Address Filter (AF) protects the client from extraneous traffic. With this technique, the
hardware matches the Destination Address (DA) field of the Ethernet MAC frame. This
relieves the task from the bus and software.
The AF is programmed in software through the host interface. Pause-frame addresses and
broadcast address are hardwired; they do not need to be programmed. The AF can be
enabled and disabled under software control, using an enable bit in the control register. See
“Address Filter Registers,” page 94 for the control register.
When the function is enabled, Ethernet frames are passed to the client interface only if they
pass the filter. When the AF function is disabled, all incoming RX frames are passed to the
client interface.
For system monitoring, the event of a frame failing the filter is signaled. Equally, when a
frame passes the filter, a match is indicated to the client by using the output pins
EMAC#CLIENTRXDVLD and EMAC#CLIENTRXFRAMEDROP together. Table 3-2 shows the
values of the two signals for possible outcomes of an incoming RX frame when the AF is
enabled.
When the AF is enabled, it is impossible to determine if there is an incoming RX frame or
if the AF has rejected incoming RX frames (using only EMAC#CLIENTRXDVLD) because in
both cases, EMAC#CLIENTRXDVLD is deasserted. However, using the
EMAC#CLIENTRXFRAMEDROP signal, the nature of an incoming RX frame can be
distinguished for system monitoring. See Table 3-2.
Table 3-2: EMAC#CLIENTRXDVLD and EMAC#CLIENTRXFRAMEDROP Values
Result of an Incoming RX Frame EMAC#CLIENTRXDVLD EMAC#CLIENTRXFRAMEDROP
No frame received 0 0
Frame received and AF address match 1 0
Frame received and no AF address match 0 1
Frame received and no AF address match but AF
disabled
Address Filter Attributes
1 1
Frame received and AF address match but AF disabled 1 0
The unicast address register, pause frame source address, and address filter promiscuous
mode bit are set by attributes when the FPGA is configured. In this way, the address filter
performs functions with the unicast address without using the host interface. The four
general address register values are not included as attributes.
TEMAC User Guide www.xilinx.com 71
UG194 (v1.10) February 14, 2011