Xilinx UG194 Virtex-5 FPGA Embedded Tri-Mode Ethernet MAC ...

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Table 2-8: PHY Data and Control Signals (Cont’d)
Signal Direction Mode Description
PHYEMAC#COL Input
10/100 MII
PHYEMAC#CRS Input 10/100 MII
Ethernet MAC Signal Descriptions
The usage of the Ethernet MAC clock signals associated with the physical interface also
changes, based on the selected configuration. This is fully described in Appendix B,
“Ethernet MAC Clocks.” Table 2-9 lists the physical interface clock signals and references
the associated descriptions of each clock.
Table 2-9: PHY Clock Signals
Table 2-10 shows Ethernet MAC output that indicates the current operating speed of the
Ethernet MAC.
RocketIO Serial Transceiver Signals
The collision control signal from the PHY, used in halfduplex
mode.
SGMII The TXRUNDISP signal from the RocketIO serial
transceiver.
1000BASE-X
The carrier sense control signal from the PHY, used in
half-duplex mode.
Signal Direction Description
PHYEMAC#MIITXCLK Input See “PHYEMAC#MIITXCLK,” page 212.
EMAC#PHYTXCLK Output See “EMAC#PHYTXCLK,” page 214.
EMAC#PHYTXGMIIMIICLKOUT Output
PHYEMAC#TXGMIIMIICLKIN Input
See “EMAC#PHYTXGMIIMIICLKOUT,
PHYEMAC#TXGMIIMIICLKIN,” page 213.
See “EMAC#PHYTXGMIIMIICLKOUT,
PHYEMAC#TXGMIIMIICLKIN,” page 213.
PHYEMAC#RXCLK Input See “PHYEMAC#RXCLK,” page 212.
Table 2-10: Physical Interface Speed Signal
Signal Direction Description
EMAC#SPEEDIS10100 Output When asserted High, the physical interface is operating at 10 Mb/s or
100 Mb/s.
When asserted Low, the physical interface is operating at 1 Gb/s.
RocketIO serial transceivers are defined by device family in the following way:
Virtex-5 LXT and SXT devices: RocketIO GTP transceivers
Virtex-5 TXT and FXT devices: RocketIO GTX transceivers
RocketIO GTP serial transceivers are placed as dual transceiver GTP_DUAL tiles in
Virtex-5 LXT and SXT devices. RocketIO GTX serial transceivers are placed as dual
transceiver GTX_DUAL tiles in Virtex-5 TXT and FXT devices. Throughout this guide, the
term RocketIO transceiver is used to represent any or all of the RocketIO transceivers; the
RocketIO transceiver that is specific to the desired target device should be selected.
Table 2-11 shows the signals used to connect the Virtex-5 FPGA Ethernet MAC to the
RocketIO serial transceiver (see the UG196, Virtex-5 FPGA RocketIO GTP Transceiver User
Guide and UG198, Virtex-5 FPGA RocketIO GTX Transceiver User Guide).
TEMAC User Guide www.xilinx.com 39
UG194 (v1.10) February 14, 2011