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ETTC'2003 - SEE

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f<br />

f<br />

p<br />

IF<br />

= R<br />

b<br />

= 4R<br />

b<br />

∆f<br />

= 0.<br />

7R<br />

b<br />

With the quick developments of ADCs as well as VLSI technologies nowadays, it becomes<br />

increasingly attractive to design IF digital receivers, which are less expensive, more accurate, and<br />

flexible while easier to be manufactured compared with traditional analog counterparts. For that<br />

reason, we present a scheme of digital PCM/FM receiver which directly samples the 2 nd IF<br />

PCM/FM signal and all demodulations will be implemented with all digital methods, which is<br />

plotted in fig.2.<br />

antenna<br />

LNA<br />

Ist<br />

local<br />

osc<br />

1st IF<br />

amplifier<br />

2nd<br />

local<br />

osc<br />

BP<br />

filter<br />

B<br />

IF<br />

AGC<br />

(1)<br />

(2)<br />

(3)<br />

2nd IF<br />

amplifier<br />

Digital receiver<br />

ADC<br />

Fixed<br />

Fig.2 Block diagram of digital PCM/FM telemetry receiver<br />

2 Design of PCM/FM digital receiver<br />

Digital<br />

demodulators<br />

data<br />

&clk<br />

A Matlab simulation model is founded to help us design and simulate PCM/FM digital<br />

receiver for Matlab is a popular and effective tool to design DSP systems nowadays, as can be<br />

seen in fig.3.<br />

an<br />

Prefilter<br />

fixed<br />

r (nT)<br />

ADC DDC<br />

g(t) x(t) y(t)<br />

Fm<br />

modulate<br />

I(n)<br />

Q(n)<br />

n(t)<br />

FM<br />

demodulation<br />

f(n)<br />

BP<br />

filter<br />

r (t)<br />

PCM<br />

demodulation<br />

Fig.3 Simulation model for digital PCM/FM receiver<br />

In the simulation model, PCM data an are bipolar NRZ codes whose rate is supposed to be<br />

2Mbps. The carrier of PCM/FM is 10MHz, and the peak modulate frequency deviation is 700KHz.<br />

PCM data are pre-filtered to be g(t) and further frequency modulates the carrier and forms<br />

PCM/FM signal x(t), it is added by a gauss white noise signal n(t) which simulates the channel<br />

noises, the sum of y(t) is bandpass filtered to suppress noises and then feeds to ADC. r(t) is<br />

sampled by the ADC at fixed rate of 64Msps and becomes discrete r(nT), the DDC module (digital<br />

down conversion) translates r(nT) from IF to baseband and forms two quadrature components of I<br />

(n) and Q (n), they are filtered and decimated to great reduce the data rate and feeds into the FM<br />

2<br />

a n<br />

)

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