ETTC'2003 - SEE

2.3 ADC
Fig.5 (a) y (t) and its spectrum Fig.5 (b) r (t) and its spectrum
It is important to select sample rate of ADC for it greatly determines the performance of the
digital receiver. The relationship between SNR and sample rate as well as resolutions of ADC is
generalized in Eq.10, where fs is the sample rate, fa is the bandwidth of the signal and N is the
resolutions. From the equation, it can be seen that there would be 3dB gain increased for SNR
every doubles the sample rate which indicates the sample rate should be selected as large as
possible, whereas large sample rate would cause big burden for computation and make the digital
receiver difficult to be implemented in real time, so there should be a tradeoff when selecting the
sample rate. Besides, the sample rate also should be selected as multiple of symbol rate because it
would be convenient to perform decimation and code synchronization. In our model, the ADC
samples r (t) at fixed 64Msps.
2.4 DDC
SNR 6. 02N
+ 1.
76dB
+ 10log10(
f s / 2 f a )
r(nT)
= (10)
sin
cos
NCO
I(nT)
Q(nT)
Multi-stage decimate
CIC
FIR
Multi-stage decimate
CIC FIR
Fig.6 Structure of DDC
I ( nT )
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Q ( nT )
The structure of DDC is plotted in fig.6, there are three signal processing stages included: a
Frequency Translator, a cascaded integrate comb (CIC) and a shaping FIR filter. Frequency
translation is accomplished with a complex Numerically Controlled Oscillator (NCO) operates at
sample rate, which outputs two quadrature local carrier and translates r(nT) from a IF to baseband
and separates it into in-phase and quadrature components as I (nT) and Q (nT) , the procedure can
4
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