Online proceedings - EDA Publishing Association

11-13
May 2011, Aix-en-Provence, France
Although the two curves fit very well even in the
structure function space where the differences are enhanced
compared to the time domain, minor differences can be
observed. We believe that they originate from the fact that
the simulations are entirely noiseless while the
measurements inherently contain some white noise. In case
of the electric measurement it is practically around 24-36
µV.
A. Compact model generation
Fig. 9: Steady-state heat-flux distribution in the simulated package and its
environment
In thermal steady-state the thermal grease acts as the
biggest thermal bottleneck in the studied system. The long
straight line in Fig. 6 marked by number 4 corresponds to
this layer and shows that it has a very large thermal
resistance compared to its low thermal capacitance.
This example shows the actual conditions in this
particular system, however similar heat-spreading
mechanisms can be identified in other power packages as
well. The results clearly show that there are three main parts
of the structure where the fine-tuning of the geometry and
the material parameters may be necessary, they are the two
die attach layers with special emphasize on the bottom one
and the TIM layer.
Still the number of the variables is large; however after
14 rounds of iterative fine-tuning we achieved a very good
correspondence between the results of the simulation model
and the real device. The corresponding structure functions
can be viewed in Fig. 10. The slight difference between the
shapes of the structure functions at their end, which describe
the ambient, is a result of the simplified model of the water
in the cold-plate. As the goal of the study was the
appropriate modeling of the package, not the ambient, the
flow of the water was not taken into account.
A compact model is a simplified representation of the
thermal behaviour of a semiconductor package. The goal of
the compact model (CTM) creation is not to resemble the
real package geometry, but to allow the prediction of
temperatures at important points of a thermal system such
as the junction itself. If a CTM is dynamic it is also possible
to predict the change of the temperature of the given node
as a function of time. As the CTM is an abstraction of the
component only, it requires less griding thus less
computational efforts. This is in addition to the fact that the
CTM hides proprietory information about the package
construction.
Such a model can be generated based on the thermal
resistance – thermal capacitance values derived from the
strucutre functions if a one-dimensional heat spreading can
be assumed. The resulting RC ladder has to be cut at the
case node. In order to identify it, the dual-interface
methodology was used. [9]
A point of separation of the structure functions was
identified after making two thermal measurements of the
same package with different boundary conditions. Whilst
the heat spreads in the same structure the structure functions
are identical, but as soon as the main trajectory of the heat
leaves the package boundary and enters the two different
interface layers a point of separation can be identified. In
case of this particular package we measured 0.34K/W. All
the derived thermal resistance and thermal capacitance
points are can be used for the model creation up to this
resistance value.
Fig. 11: Identification of the case node using the dual-interface method
Fig. 10: Comparison of the detailed model to the measurement results
In the derived model the real geometry is not considered,
only the total volume and the contact area of the package is
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