Online proceedings - EDA Publishing Association

Fig.9. Capacitive sensor output, Va as the function of the sensing distance,
Δd.
B. First-Order Σ-∆ Converter Simulation
The overall design of the Σ-∆ ADC shown was simulated
using Cadence TM Spectre. The input test analog signal is a
100mV, 500 Hz sinusoid with the oversampling frequency is
160 kHz. The oversampling ratio (OSR) is 160 and the
output resolution is around 10 and the dynamic range is over
60dB. Fig. 10 illustrates the waveforms of each stage output.
C. Results Analysis
Normally there are two ways to test the output of ADC: i)
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May 2011, Aix-en-Provence, France
using an ideal DAC to convert the digital signal back to an
analog signal and compare it with the original one, however
this requires to design another very high resolution DAC; ii)
the most popular method is using fast Fourier-transform
(FFT) to analysis the output signals in frequency domain.
FFT is commonly used to estimate the power spectral
density (PSD) of Σ-∆ converter. Data obtained from Cadence
circuit simulation is transferred to MATLAB. This is done
for signal processing analysis of the final output of the signal.
Fig. 11 shows the low frequency portion (0 to 10 kHz) of an
FFT based PSD estimate of the output with a sinusoidal input
frequency of 500Hz and f s of 160 kHz. The spectrum of Fig.
11 (a) consists of one large spike representing the input
signal sine wave, plus many smaller spikes distributed out of
the base-band frequency along the frequency axis,
representing white noise. The PSD of the output digital
signal is shown in Fig. 11 (b). It demonstrates that this
designed first-order sigma-delta converter really does shape
quantization noise. From this figure it can be seen that the
frequency of the largest spike signal is still 500Hz, which
represents the input signal. The following smaller signals are
the quantization errors; and their amplitudes are obviously
lower than the main signal. The Σ-Δ converter performs
noise-shaping and forces all the quantization errors to be
outside the frequency of the base band signal.
l
Fig.10. Each stage output of the first-order Σ-∆ ADC.
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