Online proceedings - EDA Publishing Association

given in figure 6. The bond voltage is reduced from 400 V
(#1) to 40 V (#3) while the bonding temperature was kept at
390 °C for both cases. The bond current and the transferred
charge for anodic bond of the borosilicate thin-film show the
expected characteristic behavior, though the bond voltage is
reduced to 40 V. Due to the small thickness of the bondinterface
an increased electrical current of can be observed
through the borosilicate thin-film in the steady-state. However
the sheet-resistance is as high as 3 GΩ/□ at 390 °C.
Fig. 6) Comparison of anodic bonding parameters of 3 µm
high Lithoglas frames on 500 µm Borofloat 33 (#1) with 3 µm
high Lithoglas on silicon (#3) while bonding to a silicon
wafer. The bond voltage is reduced from 400 V (#1) to as low
as 40 V (#3). Bonding temperature is 390 °C.
As mentioned above, the deposited borosilicate thin-films
can be microstructured by photo-resist lift-off. This allows the
fabrication of well-defined anodic bondable areas on devices
wafers. This technique was used to seal a silicon pressure
sensor as shown in figure 7.
11-13 May 2011, Aix-en-Provence, France
Deep Cavities using novel “Cavity-by-Grind” method
The Lithoglas process is very cost effective for the
formation of thin anodic bond interfaces or shallow cavities of
some ten micrometres. For the formation of deep cavities of
up to some hundred micrometres hybrid materials such as
Silicon-Glass Cap-Wafers are commonly used.
Principally there are two ways used for manufacturing
today. Firstly, bonding of a pre-structured spacer substrate
(e.g. a silicon wafer) having cavity holes to the cover substrate
(e.g. a glass wafer). However this process is limited to thick
spacers of some hundred micrometres in order to avoid
breakage during handling and bond.
The second method is to form the cavity in the spacer
substrate after bonding it to the cover substrate. In this case
typically a silicon wafer is bonded to glass substrate and then
the silicon is structured by wet- or plasma-etching using the
glass wafer as etch stop. Though it allows the formation of
cavities with a large scope of sizes, depths and shapes, it
requires processing on the optical surfaces as discussed
earlier.
In order to avoid the drawbacks of conventional
processing of those hybrid cap wafers, we propose a new
process flow for their manufacturing, which is very stable and
high yielding and is especially suitable for optical applications
(Fig. 8).
Fig. 8) Novel “Cavity-by-Grind” process for the
manufacturing of hybrid cavity wafers with high optical
performance.
Fig. 7) Silicon pressure sensor devices on wafer with a
3 µm thick Lithoglas anodic bond-frame around the central
structure. The deposited bond-frame hermetically seals the
conduction leads on the sensor devices. The image was taken
prior anodic bonding of the device wafer to a silicon cap
wafer.
Sealing of conduction leads by deposition of the
borosilicate glass on top is an unique feature of the Lithoglas
process, thus enabling cost-effective, hermetic feed-throughs.
As a first process step blind indentations are formed into a
thick spacer substrate. These indentations are slightly deeper
than the final cavities. With this the spacer wafers allows for
automated handling without any carrier systems even for
shallow cavities of some ten microns. We use standard (100)-
silicon wafers as spacer wafers and use wet-etching for the
formation of the blind cavities.
As a second step the thick spacer is bonded to a cover
substrate thus forming the cavities. The bonding can be done
by conventional bonding techniques like anodic, adhesive or
eutectic bonding, but also direct bonding is feasible due to the
high quality of the surfaces. For our standard product, we use
anodic bonding to bond the silicon spacer to a borosilicate
cover glass.
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