Online proceedings - EDA Publishing Association

11-13 May 2011, Aix-en-Provence, France
As a last step the excessive material is removed from the
backside of the spacer substrate thus opening the cavities and
defining their final depth. We thin down the silicon to the
final thickness by conventional back-grinding and with this
open the cavities.
Fig. 9) Example of packaging of opto-devices using
hybrid cap wafers.
Due to the high quality of cap wafers incl. their low warp
and geometrical tolerances, they can be used of wafer-level
integration of devices, but also for housing of pre-assembled
opto-devices on PCB as shown in figure 9. Today this is still
the most common configuration.
Lithoglas µCap used in Chip-On-Board Packaging
After the capping of the devices on wafer level, the
individual chips can be assembled in conventional ways with
only minor modifications to the standard processes e.g.
yielding COB components (Fig. 10). Since the devices are
pre-packaged, the subsequent assembly steps can be
performed in a cost effective, high through-put setup
significantly reducing the requirements for clean room
facilities and in-line inspection efforts even for image sensors
and other optical applications.
Fig. 10) Wafer-Level Capped Chips used in standard
Chip-on-Board Assembly Flow;
The final components achieve superior performance and
reliability, e.g.:
• There is no adhesive layer in optical path, which might
cause changes in optical characteristics due to degradation of
polymer under intensive illumination or due to delamination
of the polymer layer.
• The optical window is precisely positioned with tight
control on x, y, z as well as tilt and rotation. The tight
tolerances are proven on production level and even apply to
very small windows such as 750 x 750 µm size or smaller,
which are difficult to handle otherwise.
• The outstanding control on glue bleeding in case of
adhesive bonding and the small minimal width of the bond
frames (typ. 100 µm) allows for advanced, miniaturized
design.
• The bond interface of the Lithoglas µCap is robust and
positioned in the inner of the package, being additionally
sealed and protected by the COB molding material.
The package shown in figure 11 is used for optical pick-up
for a 405 nm application achieving high yields greater than
95% for the wafer capping process and passing JEDEC Level
1 as molded COB component.
Fig. 11) Final COB Devices with optical cavity window.
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