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80C186EC/80C188EC Microprocessor User's Manual

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BUS INTERFACE UNIT<br />

In general, prefix bytes (such as LOCK) are considered extensions of the instructions they precede.<br />

Interrupts, DMA requests and refresh requests that occur during execution of the prefix are<br />

not acknowledged until the instruction following the prefix completes (except for instructions<br />

that are servicing interrupts during their execution, such as HALT, WAIT and repeated string<br />

primitives). Note that multiple prefix bytes can precede an instruction.<br />

Another example is a string primitive preceded by the repetition prefix (REP), which can be interrupted<br />

after each execution of the string primitive, even if the REP prefix is combined with the<br />

LOCK prefix. This prevents interrupts from being locked out during a block move or other repeated<br />

string operations. However, bus hold, DMA and refresh requests remain locked out until<br />

LOCK is removed (either when the block operation completes or after an interrupt occurs.<br />

3.7 MULTI-MASTER BUS SYSTEM DESIGNS<br />

The BIU supports protocols for transferring control of the local bus between itself and other devices<br />

capable of acting as bus masters. To support such a protocol, the BIU uses a hold request<br />

input (HOLD) and a hold acknowledge output (HLDA) as bus transfer handshake signals. To<br />

gain control of the bus, a device asserts the HOLD input, then waits until the HLDA output goes<br />

active before driving the bus. After HLDA goes active, the requesting device can take control of<br />

the local bus and remains in control of the bus until HOLD is removed.<br />

3.7.1 Entering Bus HOLD<br />

In responding to the hold request input, the BIU floats the entire address and data bus, and many<br />

of the control signals. Figure 3-34 illustrates the timing sequence when acknowledging the hold<br />

request. Table 3-7 lists the states of the BIU pins when HLDA is asserted. All device pins not<br />

mentioned in Table 3-7 or shown in Figure 3-34 remain either active (e.g., CLKOUT and<br />

T1OUT) or inactive (e.g., UCS and INTA). Refer to the data sheet for specific details of pin functions<br />

during a bus hold.<br />

3-41

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