80C186EC/80C188EC Microprocessor User's Manual

INSTRUCTION SET DESCRIPTIONS
SHR
STC
STD
Shift Logical Right:
SHR dest, src
Shifts the bits in the destination
operand (byte or word) to the right by
the number of bits specified in the
count operand. Zeros are shifted in on
the left. If the sign bit retains its original
value, then OF is cleared.
Instruction Operands:
SHR reg, n
SHR mem, n
SHR reg, CL
SHR mem, CL
Set Carry Flag:
STC
Sets CF to 1.
Instruction Operands:
none
Table C-4. Instruction Set (Continued)
Name Description Operation
NOTE:
Set Direction Flag:
STD
Sets DF to 1 causing the string instructions
to auto-decrement the SI and/or
DI index registers.
Instruction Operands:
none
(temp) ← count
do while (temp) ≠ 0
(CF) ← low-order bit of (dest)
(dest) ← (dest) / 2
(temp) ← (temp) – 1
if
count = 1
then
if
high-order bit of (dest) ≠
next-to-high-order bit of (dest)
then
(OF) ← 1
else
(OF) ← 0
else
(OF) undefined
Flags
Affected
AF
CF ü
DF –
IF –
OF ü
PF ü
SF ü
TF –
ZF ü
(CF) ← 1 AF –
CF ü
DF –
IF –
OF –
PF –
SF –
TF –
ZF –
(DF) ← 1 AF –
CF –
DF ü
IF –
OF –
PF –
SF –
TF –
ZF –
The three symbols used in the Flags Affected column are defined as follows:
– the contents of the flag remain unchanged after the instruction is executed
the contents of the flag is undefined after the instruction is executed
üthe flag is updated after the instruction is executed
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