80C186EC/80C188EC Microprocessor User's Manual

CHIP-SELECT UNIT
The START register (Figure 6-5) defines the starting address and the wait state requirements. The
STOP register (Figure 6-6) defines the ending address and the bus ready, bus cycle and enable
requirements.
6.4.1 Initialization Sequence
Chip-selects do not have to be initialized in any specific order. However, the following guidelines
help prevent a system failure.
1. Initialize local memory chip-selects
2. Initialize local peripheral chip-selects
3. Perform local diagnostics
4. Initialize off-board memory and peripheral chip-selects
5. Complete system diagnostics
An unmasked interrupt or NMI must not occur until the interrupt vector addresses have been written
to memory. Failure to prevent an interrupt from occurring during initialization will cause a
system failure. Use external logic to generate the chip-select if interrupts cannot be masked prior
to initialization.
6-6