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80C186EC/80C188EC Microprocessor User's Manual

80C186EC/80C188EC Microprocessor User's Manual

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OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE<br />

FFFFFH<br />

A<br />

B<br />

Data:<br />

DS:<br />

B<br />

C<br />

Code:<br />

CS:<br />

E<br />

Stack:<br />

SS:<br />

H<br />

D<br />

Extra:<br />

ES:<br />

J<br />

E<br />

F<br />

G<br />

H<br />

J<br />

I<br />

K<br />

0H<br />

A1037-0A<br />

Figure 2-7. Currently Addressable Segments<br />

The segment register is automatically selected according to the rules in Table 2-2. All information<br />

in one segment type generally shares the same logical attributes (e.g., code or data). This leads to<br />

programs that are shorter, faster and better structured.<br />

The Bus Interface Unit must obtain the logical address before generating the physical address.<br />

The logical address of a memory location can come from different sources, depending on the type<br />

of reference that is being made (see Table 2-2).<br />

Segment registers always hold the segment base addresses. The Bus Interface Unit determines<br />

which segment register contains the base address according to the type of memory reference<br />

made. However, the programmer can explicitly direct the Bus Interface Unit to use any currently<br />

addressable segment (except for the destination operand of a string instruction). In assembly language,<br />

this is done by preceding an instruction with a segment override prefix.<br />

2-11

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