80C186EC/80C188EC Microprocessor User's Manual

TIMER/COUNTER UNIT
When configured for internal clocking, the Timer/Counter Unit uses the input pins either to enable
timer counting or to retrigger the associated timer. Externally, a timer increments on low-tohigh
transitions on its input pin (up to ¼ CLKOUT frequency).
Timers 0 and 1 each have a single output pin. Timer output can be either a single pulse, indicating
the end of a timing cycle, or a variable duty cycle wave. These two output options correspond to
single maximum count mode and dual maximum count mode, respectively (Figure 9-4). Interrupts
can be generated at the end of every timing cycle.
Timer 2 has no input or output pins and can be operated only in single maximum count mode
(Figure 9-4). It can be used as a free-running clock and as a prescaler to Timers 0 and 1. Timer 2
can be clocked only internally, at ¼ CLKOUT frequency. Timer 2 can also generate interrupts at
the end of every timing cycle.
Maxcount A
Maxcount B
Dual Maximum
Count Mode
Maxcount A
One CPU
Clock
Single Maximum
Count Mode
A1296-0A
Figure 9-4. Timer/Counter Unit Output Modes
9.2 PROGRAMMING THE TIMER/COUNTER UNIT
Each timer has three registers: a Timer Control register (Figure 9-5 and Figure 9-6), a Timer
Count register (Figure 9-7) and a Timer Maxcount Compare register (Figure 9-8). Timers 0 and
1 also have access to an additional Maxcount Compare register. The Timer Control register controls
timer operation. The Timer Count register holds the current timer count value, and the Maxcount
Compare register holds the maximum timer count value.
9-6