80C186EC/80C188EC Microprocessor User's Manual

INTERRUPT CONTROL UNIT
;Now start the master initialization
MOV DX, MPICP0 ;ICW1 for the slave is accessed
;thru MPICP0
XOR AH, AH ;Clear reserved bits
MOV AL, 10001B ;Edge trigger, cascade mode,
;IC4 required
OUT DX, AL
;Now set base interrupt type at 20H (Type 32) for the master module in ICW2.
;This creates a contiguous block for the interrupt control unit
;from type 20H to type 2FH.
MOV DX, MPICP1 ;ICW2 is accessed thru MPICP1
MOV AL, 20H ;Base type is 20H (Type 32)
OUT DX, AL
;Now program the master cascade configuration register in ICW3
MOV DX, MPICP1 ;ICW3 is also thru MPICP1
MOV AL, 80H ;Slave module is always on IR7
OUT DX, AL
;ICW4 completes the initialization
MOV DX, MPICP1 ;ICW4 is also thru MPICP1
MOV AL, 1B ;No special fully nested mode,
;no AEOI mode, factory test codes
;set correctly
OUT DX, AL
;Initialization is now complete. we can unmask global interrupts.
STI
BOOT_ROM ENDS
Example 8-1. Initializing the Interrupt Control Unit (Continued)
8-49