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Chapter 4. Floating-Point Processor [Category:
Floating-Point]
4.1 Floating-Point Processor Overview 89
4.2 Floating-Point Processor Registers 90
4.2.1 Floating-Point Registers . . . . . . . 90
4.2.2 Floating-Point Status and Control
Register. . . . . . . . . . . . . . . . . . . . . . . . . 91
4.3 Floating-Point Data . . . . . . . . . . . . . 93
4.3.1 Data Format. . . . . . . . . . . . . . . . . 93
4.3.2 Value Representation . . . . . . . . . 94
4.3.3 Sign of Result . . . . . . . . . . . . . . . 95
4.3.4 Normalization and
Denormalization . . . . . . . . . . . . . . . . . . 95
4.3.5 Data Handling and Precision . . . . 96
4.3.5.1 Single-Precision Operands. . . . 96
4.3.5.2 Integer-Valued Operands . . . . . 97
4.3.6 Rounding . . . . . . . . . . . . . . . . . . . 97
4.4 Floating-Point Exceptions. . . . . . . . 98
4.4.1 Invalid Operation Exception. . . . 100
4.4.1.1 Definition. . . . . . . . . . . . . . . . . 100
4.4.1.2 Action . . . . . . . . . . . . . . . . . . . 100
4.4.2 Zero Divide Exception . . . . . . . . 101
4.4.2.1 Definition. . . . . . . . . . . . . . . . . 101
4.4.2.2 Action . . . . . . . . . . . . . . . . . . . 101
4.4.3 Overflow Exception . . . . . . . . . . 101
4.4.3.1 Definition. . . . . . . . . . . . . . . . . 101
4.4.3.2 Action . . . . . . . . . . . . . . . . . . . 101
4.4.4 Underflow Exception . . . . . . . . . 102
4.4.4.1 Definition. . . . . . . . . . . . . . . . . 102
4.4.4.2 Action . . . . . . . . . . . . . . . . . . . 102
4.4.5 Inexact Exception . . . . . . . . . . . 103
4.4.5.1 Definition. . . . . . . . . . . . . . . . . 103
4.4.5.2 Action . . . . . . . . . . . . . . . . . . . 103
4.5 Floating-Point Execution Models . 103
4.5.1 Execution Model for IEEE Operations
. . . . . . . . . . . . . . . . . . . . . . . . . . . 103
4.5.2 Execution Model for
Multiply-Add Type Instructions. . . . . . . 105
4.6 Floating-Point Processor Instructions .
106
4.6.1 Floating-Point Storage Access
Instructions . . . . . . . . . . . . . . . . . . . . . 106
4.6.1.1 Storage Access Exceptions. . . 106
4.6.2 Floating-Point Load Instructions. 106
4.6.3 Floating-Point Store Instructions 109
4.6.4 Floating-Point Move Instructions 113
4.6.5 Floating-Point Arithmetic Instructions
114
4.6.5.1 Floating-Point Elementary Arithmetic
Instructions. . . . . . . . . . . . . . . . . 114
4.6.5.2 Floating-Point Multiply-Add Instructions
. . . . . . . . . . . . . . . . . . . . . . . . . . . 118
4.6.6 Floating-Point Rounding and Conversion
Instructions . . . . . . . . . . . . . . . 120
4.6.6.1 Floating-Point Rounding Instruction.
. . . . . . . . . . . . . . . . . . . . . . . . . . . 120
4.6.6.2 Floating-Point Convert To/From
Integer Instructions . . . . . . . . . . . . . . . 120
4.6.6.3 Floating Round to Integer Instructions
[Category: Floating-Point.Phased-In]
122
4.6.7 Floating-Point Compare Instructions
124
4.6.8 Floating-Point Select Instruction 125
4.6.9 Floating-Point Status and Control
Register Instructions . . . . . . . . . . . . . . 125
4.1 Floating-Point Processor
Overview
This chapter describes the registers and instructions
that make up the Floating-Point Processor facility.
The processor (augmented by appropriate software
support, where required) implements a floating-point
system compliant with the ANSI/IEEE Standard
754-1985, "IEEE Standard for Binary Floating-Point
Arithmetic" (hereafter referred to as "the IEEE standard").
That standard defines certain required "operations"
(addition, subtraction, etc.). Herein, the term
"floating-point operation" is used to refer to one of
these required operations and to additional operations
defined (e.g., those performed by Multiply-Add or
Chapter 4. Floating-Point Processor [Category: Floating-Point]
89