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Version 2.03
D.4 Subtract Mnemonics
D.4.1
Subtract Immediate
Although there is no “Subtract Immediate” instruction, its effect can be achieved by using an Add Immediate instruction
with the immediate operand negated. Extended mnemonics are provided that include this negation, making the
intent of the computation clearer.
subi Rx,Ry,value (equivalent to: addi Rx,Ry,-value)
subis Rx,Ry,value (equivalent to: addis Rx,Ry,-value)
subic Rx,Ry,value (equivalent to: addic Rx,Ry,-value)
subic. Rx,Ry,value (equivalent to: addic. Rx,Ry,-value)
D.4.2
Subtract
The Subtract From instructions subtract the second operand (RA) from the third (RB). Extended mnemonics are provided
that use the more “normal” order, in which the third operand is subtracted from the second. Both these mnemonics
can be coded with a final “o” and/or “.” to cause the OE and/or Rc bit to be set in the underlying instruction.
sub Rx,Ry,Rz (equivalent to: subf Rx,Rz,Ry)
subc Rx,Ry,Rz (equivalent to: subfc Rx,Rz,Ry)
D.5 Compare Mnemonics
The L field in the fixed-point Compare instructions controls whether the operands are treated as 64-bit quantities or
as 32-bit quantities. Extended mnemonics are provided that represent the L value in the mnemonic rather than
requiring it to be coded as a numeric operand.
The BF field can be omitted if the result of the comparison is to be placed into CR Field 0. Otherwise the target CR
field must be specified as the first operand. One of the CR field symbols defined in Section D.1 can be used for this
operand.
D.5.1
Doubleword Comparisons
Table 14: Doubleword compare mnemonics
Operation Extended Mnemonic Equivalent to
Compare doubleword immediate cmpdi bf,ra,si cmpi bf,1,ra,si
Compare doubleword cmpd bf,ra,rb cmp bf,1,ra,rb
Compare logical doubleword immediate cmpldi bf,ra,ui cmpli bf,1,ra,ui
Compare logical doubleword cmpld bf,ra,rb cmpl bf,1,ra,rb
Examples
1. Compare register Rx and immediate value 100 as unsigned 64-bit integers and place result into CR0.
cmpldi Rx,100 (equivalent to: cmpli 0,1,Rx,100)
2. Same as (1), but place result into CR4.
cmpldi cr4,Rx,100 (equivalent to: cmpli 4,1,Rx,100)
3. Compare registers Rx and Ry as signed 64-bit integers and place result into CR0.
cmpd Rx,Ry (equivalent to: cmp 0,1,Rx,Ry)
Appendix D. Assembler Extended Mnemonics
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