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Version 2.03
Vector Multiply-Sum Signed Halfword
Modulo
VA-form
Vector Multiply-Sum Signed Halfword
Saturate
VA-form
vmsumshm VRT,VRA,VRB,VRC
vmsumshs
VRT,VRA,VRB,VRC
4 VRT VRA VRB VRC 40
0 6 11 16 21 26 31
do i=0 to 127 by 32
temp (VRC) i:i+31
do j=0 to 31 by 16
prod 0:31 (VRA) i+j:i+j+15 × si (VRB) i+j:i+j+15
temp temp + int prod
VRT i:i+31 temp
For each word element in VRT the following operations
are performed, in the order shown.
- Each of the two signed-integer halfword elements
contained in the corresponding word
element of VRA is multiplied by the corresponding
signed-integer halfword element in
VRB, producing a signed-integer product.
- The sum of these two signed-integer word
products is added to the signed-integer word
element in VRC.
- The signed-integer word result is placed into
the corresponding word element of VRT.
Special Registers Altered:
None
4 VRT VRA VRB VRC 41
0 6 11 16 21 26 31
do i=0 to 127 by 32
temp EXTS((VRC) i:i+31 )
do j=0 to 31 by 16
prod EXTS((VRA) i+j:i+j+15 )
× si EXTS((VRB) i+j:i+j+15 )
temp temp + int prod
VRT i:i+31 Clamp(temp, -2 31 , 2 31 -1)
For each word element in VRT the following operations
are performed, in the order shown.
- Each of the two signed-integer halfword elements
contained in the corresponding word
element of VRA is multiplied by the corresponding
signed-integer halfword element in
VRB, producing a signed-integer product.
- The sum of these two signed-integer word
products is added to the signed-integer word
element in VRC.
- If the intermediate result is greater than 2 31 -1
the result saturates to 2 31 -1 and if it is less
than -2 31 it saturates to -2 31 .
- The result is placed into the corresponding
word element of VRT.
Special Registers Altered:
SAT
Chapter 5. Vector Processor [Category: Vector]
165