Power ISA™ Version 2.03 - Power.org

Version 2.03
Floating-Point Double-Precision Compare
Greater Than
EVX-Form
Floating-Point Double-Precision Compare
Less Than
EVX-Form
efdcmpgt
BF,RA,RB
efdcmplt
BF,RA,RB
4 BF // RA RB 748
0 6 9 11 16 21 31
4 BF // RA RB 749
0 6 9 11 16 21 31
al (RA) 0:63
bl (RB) 0:63
if (al > bl) then cl 1
else cl 0
CR 4×BF:4×BF+3 undefined || cl || undefined || undefined
RA is compared against RB. If RA is greater than RB,
bit 1 of CR field BF is set to 1, otherwise it is set to 0.
Bits 0, 2, and 3 of CR field BF are undefined. Comparison
ignores the sign of 0 (+0 = -0).
If an input error occurs and default results are generated,
NaNs, Infinities, and Denorms are treated as normalized
numbers, using their values of ‘e’ and ‘f’
directly.
Special Registers Altered:
FINV FINVS
FG FX
CR field BF
al 1 (RA) 0:63
bl 1 (RB) 0:63
if (al < bl) then cl 1 1
else cl 1 0
CR 4×BF:4×BF+3 1 undefined || cl || undefined || undefined
RA is compared against RB. If RA is less than RB, bit 1
of CR field BF is set to 1, otherwise it is set to 0. Bits 0,
2, and 3 of CR field BF are undefined. Comparison
ignores the sign of 0 (+0 = -0).
If an input error occurs and default results are generated,
NaNs, Infinities, and Denorms are treated as normalized
numbers, using their values of ‘e’ and ‘f’
directly.
Special Registers Altered:
FINV FINVS
FG FX
CR field BF
Floating-Point Double-Precision Compare
Equal
EVX-Form
Floating-Point Double-Precision Test
Greater Than
EVX-Form
efdcmpeq
BF,RA,RB
efdtstgt
BF,RA,RB
4 BF // RA RB 750
0 6 9 11 16 21 31
4 BF // RA RB 764
0 6 9 11 16 21 31
al 1 (RA) 0:63
bl 1 (RB) 0:63
if (al = bl) then cl 1 1
else cl 1 0
CR 4×BF:4×BF+3 1 undefined || cl || undefined || undefined
RA is compared against RB. If RA is equal to RB, bit 1
of CR field BF is set to 1, otherwise it is set to 0. Bits 0,
2, and 3 of CR field BF are undefined. Comparison
ignores the sign of 0 (+0 = -0).
If an input error occurs and default results are generated,
NaNs, Infinities, and Denorms are treated as normalized
numbers, using their values of ‘e’ and ‘f’
directly.
Special Registers Altered:
FINV FINVS
FG FX
CR field BF
al 1 (RA) 0:63
bl 1 (RB) 0:63
if (al > bl) then cl 1 1
else cl 1 0
CR 4×BF:4×BF+3 1 undefined || cl || undefined || undefined
RA is compared against RB. If RA is greater than RB,
bit 1 of CR field BF is set to 1, otherwise it is set to 0.
Bits 0, 2, and 3 of CR field BF are undefined. Comparison
ignores the sign of 0 (+0 = -0). The comparison
proceeds after treating NaNs, Infinities, and Denorms
as normalized numbers, using their values of ‘e’ and ‘f’
directly.
No exceptions are generated during the execution of
efdtstgt.
Special Registers Altered:
CR field BF
Programming Note
In an implementation, the execution of efdtstgt is
likely to be faster than the execution of efdcmpgt;
however, if strict IEEE 754 compliance is required,
the program should use efdcmpgt.
270
Power ISA -- Book I