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Power ISA™ Version 2.03 - Power.org

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<strong>Version</strong> <strong>2.03</strong><br />

Vector Subtract Unsigned, Modulo,<br />

Integer to Accumulator Word EVX-form<br />

evsubfumiaaw RT,RA<br />

4 RT RA /// 1226<br />

0 6 11 16 21 31<br />

RT 0:31 (ACC) 0:31 - (RA) 0:31<br />

RT 32:63 (ACC) 32:63 - (RA) 32:63<br />

ACC 0:63 (RT) 0:63<br />

Each unsigned-integer word element in RA is subtracted<br />

from the corresponding element in the accumulator<br />

and the results are placed in RT and into the<br />

accumulator.<br />

Special Registers Altered:<br />

ACC<br />

Vector Subtract Unsigned, Saturate,<br />

Integer to Accumulator Word EVX-form<br />

Vector Subtract from Word<br />

evsubfw<br />

RT,RA,RB<br />

4 RT RA RB 516<br />

EVX-form<br />

0 6 11 16 21 31<br />

RT 0:31 (RB) 0:31 - (RA) 0:31<br />

RT 32:63 (RB) 32:63 - (RA) 32:63<br />

Each signed-integer element of RA is subtracted from<br />

the corresponding element of RB and the results are<br />

placed in RT.<br />

Special Registers Altered:<br />

None<br />

Vector Subtract Immediate from Word<br />

EVX-form<br />

evsubfusiaaw RT,RA<br />

evsubifw<br />

RT,UI,RB<br />

4 RT RA /// 1218<br />

0 6 11 16 21 31<br />

temp 0:63 EXTZ((ACC) 0:31 ) - EXTZ((RA) 0:31 )<br />

ovh temp 31<br />

RT 0:31 SATURATE(ovh, temp 31 , 0x0000_0000,<br />

0x0000_0000, temp 32:63 )<br />

temp 0:63 EXTS((ACC) 32:63 ) - EXTS((RA) 32:63 )<br />

ovl temp 31<br />

RT 32:63 SATURATE(ovl, temp 31 , 0x0000_0000,<br />

0x0000_0000, temp 32:63 )<br />

ACC 0:63 (RT) 0:63<br />

SPEFSCR OVH ovh<br />

SPEFSCR OV ovl<br />

SPEFSCR SOVH SPEFSCR SOVH | ovh<br />

SPEFSCR SOV SPEFSCR SOV | ovl<br />

Each unsigned-integer word element in RA is<br />

zero-extended and subtracted from the corresponding<br />

zero-extended element in the accumulator saturating if<br />

overflow occurs, and the results are placed in RT and<br />

the accumulator.<br />

Special Registers Altered:<br />

ACC, OV, OVH, SOV, SOVH<br />

RT 0:31 (RB) 0:31 - EXTZ(UI)<br />

RT 32:63 (RB) 32:63 - EXTZ(UI)<br />

UI is zero-extended and subtracted from both the high<br />

and low elements of RB. Note that the same value is<br />

subtracted from both elements of the register.<br />

Special Registers Altered:<br />

None<br />

Vector XOR<br />

evxor<br />

4 RT UI RB 518<br />

0 6 11 16 21 31<br />

RT,RA,RB<br />

4 RT RA RB 534<br />

EVX-form<br />

0 6 11 16 21 31<br />

RT 0:31 (RA) 0:31 ⊕ (RB) 0:31<br />

RT 32:63 (RA) 32:63 ⊕ (RB) 32:63<br />

Each element of RA and RB is exclusive-ORed. The<br />

results are placed in RT.<br />

Special Registers Altered:<br />

None<br />

Chapter 6. Signal Processing Engine (SPE)<br />

247

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