Power ISA™ Version 2.03 - Power.org

Version 2.03
Appendix F. Opcode Maps
This appendix contains tables showing the opcodes
and extended opcodes.
For the primary opcode table (Table 1 on page 746),
each cell is in the following format.
The category abbreviations are shown on Section 1.3.5
of Book I.
The extended opcode tables show the extended
opcode in decimal, the instruction mnemonic, the category,
and the instruction format. These tables appear in
order of primary opcode within three groups. The first
group consists of the primary opcodes that have small
extended opcode fields (2-4 bits), namely 30, 58, and
62. The second group consists of primary opcodes that
have 11-bit extended opcode fields. The third group
consists of primary opcodes that have 10-bit extended
opcode fields. The tables for the second and third
groups are rotated.
In the extended opcode tables several special markings
are used.
Opcode in
Decimal
Category
Instruction
Mnemonic
Opcode in
Hexadecimal
Instruction
Format
A prime (‘) following an instruction mnemonic
denotes an additional cell, after the lowest-numbered
one, used by the instruction. For example,
subfc occupies cells 8 and 520 of primary opcode
31, with the former corresponding to OE=0 and the
latter to OE=1. Similarly, sradi occupies cells 826
and 827, with the former corresponding to sh 5 =0
and the latter to sh 5 =1 (the 9-bit extended opcode
413, shown on page 82, excludes the sh 5 bit).
Two vertical bars (||) are used instead of primed
mnemonics when an instruction occupies an entire
column of a table. The instruction mnemonic is
repeated in the last cell of the column.
For primary opcode 31, an asterisk (*) in a cell that
would otherwise be empty means that the cell is
reserved because it is “overlaid”, by a fixed-point
or Storage Access instruction having only a primary
opcode, by an instruction having an
extended opcode in primary opcode 30, 58, or 62,
or by a potential instruction in any of the categories
just mentioned. The overlaying instruction, if any,
is also shown. A cell thus reserved should not be
assigned to an instruction having primary opcode
31. (The overlaying is a consequence of opcode
decoding for fixed-point instructions: the primary
opcode, and the extended opcode if any, are
mapped internally to a 10-bit “compressed
opcode” for ease of subsequent decoding.)
Parentheses around the opcode or extended
opcode mean that the instruction was defined in
earlier versions of the Power ISA but is no longer
defined in the Power ISA.
Curly brackets around the opcode or extended
opcode mean that the instruction will be defined in
future versions of the Power ISA.
long is used as filler for mnemonics that are longer
than a table cell.
An empty cell, a cell containing only an asterisk, or a
cell in which the opcode or extended opcode is parenthesized,
corresponds to an illegal instruction.
The instruction consisting entirely of binary 0s causes
the system illegal instruction error handler to be
invoked for all members of the POWER family, and this
is likely to remain true in future models (it is guaranteed
in the Power ISA). An instruction having primary
opcode 0 but not consisting entirely of binary 0s is
reserved except for the following extended opcode
(instruction bits 21:30).
256 Service Processor “Attention” (Power ISA
only)
Appendix F. Opcode Maps
745