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Power ISA™ Version 2.03 - Power.org

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<strong>Version</strong> <strong>2.03</strong><br />

Rotate Left Word then AND with Mask<br />

M-form<br />

rlwnm RA,RS,RB,MB,ME (Rc=0)<br />

rlwnm. RA,RS,RB,MB,ME (Rc=1)<br />

23 RS RA RB MB ME Rc<br />

0 6 11 16 21 26 31<br />

n (RB) 59:63<br />

r ROTL 32 ((RS) 32:63 , n)<br />

m MASK(MB+32, ME+32)<br />

RA r & m<br />

The contents of register RS are rotated 32 left the number<br />

of bits specified by (RB) 59:63 . A mask is generated<br />

having 1-bits from bit MB+32 through bit ME+32 and<br />

0-bits elsewhere. The rotated data are ANDed with the<br />

generated mask and the result is placed into register<br />

RA.<br />

Special Registers Altered:<br />

CR0<br />

(if Rc=1)<br />

Extended Mnemonics:<br />

Example of extended mnemonics for Rotate Left Word<br />

then AND with Mask:<br />

Extended:<br />

Equivalent to:<br />

rotlw Rx,Ry,Rz rlwnm Rx,Ry,Rz,0,31<br />

Programming Note<br />

Let RSL represent the low-order 32 bits of register<br />

RS, with the bits numbered from 0 through 31.<br />

rlwnm can be used to extract an n-bit field that<br />

starts at variable bit position b in RSL, right-justified<br />

into the low-order 32 bits of register RA (clearing<br />

the remaining 32-n bits of the low-order 32 bits of<br />

RA), by setting RB 59:63 =b+n, MB=32-n, and<br />

ME=31. It can be used to extract an n-bit field that<br />

starts at variable bit position b in RSL, left-justified<br />

into the low-order 32 bits of register RA (clearing<br />

the remaining 32-n bits of the low-order 32 bits of<br />

RA), by setting RB 59:63 =b, MB = 0, and ME=n-1. It<br />

can be used to rotate the contents of the low-order<br />

32 bits of a register left (right) by variable n bits, by<br />

setting RB 59:63 =n (32-n), MB=0, and ME=31.<br />

For all the uses given above, the high-order 32 bits<br />

of register RA are cleared.<br />

Extended mnemonics are provided for some of<br />

these uses; see Appendix D, “Assembler Extended<br />

Mnemonics” on page 313.<br />

Rotate Left Word Immediate then Mask<br />

Insert<br />

M-form<br />

rlwimi RA,RS,SH,MB,ME (Rc=0)<br />

rlwimi. RA,RS,SH,MB,ME (Rc=1)<br />

20 RS RA SH MB ME Rc<br />

0 6 11 16 21 26 31<br />

n SH<br />

r ROTL 32 ((RS) 32:63 , n)<br />

m MASK(MB+32, ME+32)<br />

RA r&m | (RA)&¬m<br />

The contents of register RS are rotated 32 left SH bits.<br />

A mask is generated having 1-bits from bit MB+32<br />

through bit ME+32 and 0-bits elsewhere. The rotated<br />

data are inserted into register RA under control of the<br />

generated mask.<br />

Special Registers Altered:<br />

CR0<br />

(if Rc=1)<br />

Extended Mnemonics:<br />

Example of extended mnemonics for Rotate Left Word<br />

Immediate then Mask Insert:<br />

Extended:<br />

Equivalent to:<br />

inslwi Rx,Ry,n,b rlwimi Rx,Ry,32-b,b,b+n-1<br />

Programming Note<br />

Let RAL represent the low-order 32 bits of register<br />

RA, with the bits numbered from 0 through 31.<br />

rlwimi can be used to insert an n-bit field that is<br />

left-justified in the low-order 32 bits of register RS,<br />

into RAL starting at bit position b, by setting<br />

SH=32-b, MB=b, and ME=(b+n)-1. It can be used<br />

to insert an n-bit field that is right-justified in the<br />

low-order 32 bits of register RS, into RAL starting at<br />

bit position b, by setting SH=32-(b+n), MB=b, and<br />

ME=(b+n)-1.<br />

Extended mnemonics are provided for both of<br />

these uses; see Appendix D, “Assembler Extended<br />

Mnemonics” on page 313.<br />

76<br />

<strong>Power</strong> ISA -- Book I

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