Power ISA™ Version 2.03 - Power.org

Version 2.03
Floating-Point Single-Precision Compare
Equal
EVX-Form
Floating-Point Single-Precision Test
Greater Than
EVX-Form
efscmpeq
BF,RA,RB
efststgt
BF,RA,RB
4 BF // RA RB 718
0 6 9 11 16 21 31
4 BF // RA RB 732
0 6 9 11 16 21 31
al 1 (RA) 32:63
bl 1 (RB) 32:63
if (al = bl) then cl 1 1
else cl 1 0
CR 4×BF:4×BF+3 1 undefined || cl || undefined || undefined
The low element of register RA is compared against the
low element of register RB. If RA 32:63 is equal to
RB 32:63 , bit 1 of CR field BF is set to 1, otherwise it is
set to 0. Bits 0, 2, and 3 of CR field BF are undefined.
Comparison ignores the sign of 0 (+0 = -0).
If an Input Error occurs and default results are generated,
NaNs, Infinities, and Denorms are treated as normalized
numbers, using their values of ‘e’ and ‘f’
directly.
Special Registers Altered:
FINV FINVS
FG FX
CR field BF
al 1 (RA) 32:63
bl 1 (RB) 32:63
if (al > bl) then cl 1 1
else cl 1 0
CR 4×BF:4×BF+3 1 undefined || cl || undefined || undefined
The low element of register RA is compared against the
low element of register RB. If RA 32:63 is greater than
RB 32:63 , bit 1 of CR field BF is set to 1, otherwise it is
set to 0. Bits 0, 2, and 3 of CR field BF are undefined.
Comparison ignores the sign of 0 (+0 = -0). The comparison
proceeds after treating NaNs, Infinities, and
Denorms as normalized numbers, using their values of
‘e’ and ‘f’ directly.
No exceptions are generated during the execution of
efststgt.
Special Registers Altered:
CR field BF
Programming Note
In an implementation, the execution of efststgt is
likely to be faster than the execution of efscmpgt;
however, if strict IEEE 754 compliance is required,
the program should use efscmpgt.
264
Power ISA -- Book I