Power ISA™ Version 2.03 - Power.org

Version 2.03
“Assembler Extended Mnemonics” on page 471), the
Decrementer can be written from GPR Rx using:
mtdec Rx
The Decrementer can be read into GPR Rx using:
mfdec Rx
Copying the Decrementer to a GPR has no effect on
the Decrementer contents or on the interrupt mechanism.
7.4 Hypervisor Decrementer
The Hypervisor Decrementer (HDEC) is a 32-bit decrementing
counter that provides a mechanism for causing
a Hypervisor Decrementer interrupt after a programmable
delay. The contents of the Decrementer are treated
as a signed integer.
HDEC
32 63
Figure 38. Hypervisor Decrementer
The Hypervisor Decrementer is a hypervisor resource;
Chapter 2. “Logical Partitioning (LPAR)” on page 389.
The Hypervisor Decrementer is driven by the same frequency
as the Time Base. The period of the Hypervisor
Decrementer will depend on the driving frequency, but
if the same values are used as given above for the
Time Base (see Section 7.2), and if the Time Base
update frequency is constant, the period would be
2 32 × 32
T DEC = -------------------- = 137 seconds.
1 GHz
When the contents of HDEC 32 change from 0 to 1, a
Hypervisor Decrementer exception will come into existence
within a reasonable period or time. When the contents
of HDEC 32 change from 1 to 0, an existing
Hypervisor Decrementer exception will cease to exist
within a reasonable period of time, but not later than
the completion of the next context synchronizing
instruction or event.
The preceding paragraph applies regardless of whether
the change in the contents of HDEC 32 is the result of
decrementation of the Hypervisor Decrementer by the
processor or of modification of the Hypervisor Decrementer
caused by execution of an mtspr instruction.
The operation of the Hypervisor Decrementer satisfies
the following constraints.
1. The operation of the Time Base and the Hypervisor
Decrementer is coherent, i.e., the counters are
driven by the same fundamental time base.
2. Loading a GPR from the Hypervisor Decrementer
has no effect on the accuracy of the Hypervisor
Decrementer.
3. Copying the contents of a GPR to the Hypervisor
Decrementer replaces the contents of the Hypervisor
Decrementer with the contents of the GPR.
Programming Note
In systems that change the Time Base update frequency
for purposes such as power management,
the Hypervisor Decrementer update frequency will
also change. Software must be aware of this in
order to set interval timers.
7.5 Processor Utilization of
Resources Register (PURR)
The Processor Utilization of Resources Register
(PURR) is a 64-bit counter, the contents of which provide
an estimate of the resources used by the processor.
The contents of the PURR are treated as a 64-bit
unsigned integer.
PURR
0 63
Figure 39. Processor Utilization of Resources
Register
The PURR is a hypervisor resource; see Chapter 2.
The contents of the PURR increase monotonically,
unless altered by software, until the sum of the contents
plus the amount by which it is to be increased
exceed 0xFFFF_FFFF_FFFF_FFFF (2 64 - 1) at which
point the contents are replaced by that sum modulo
2 64 . There is no interrupt or other indication when this
occurs.
The rate at which the value represented by the contents
of the PURR increases is an estimate of the portion
of resources used by the processor with respect to
other processors that share those resources monitored
by the PURR.
Let the difference between the value represented by
the contents of the Time Base at times T a and T b be
T ab . Let the difference between the value represented
by the contents of the PURR at time T a and T b be the
value P ab . The ratio of P ab /T ab is an estimate of the percentage
of shared resources used by the processor
during the interval T ab . For the set {S} of processors
that share the resources monitored by the PURR, the
sum of the usage estimates for all the processors in the
set is 1.0.
The definition of the set of processors S, the shared
resources corresponding to the set S, and specifics of
the algorithm for incrementing the PURR are implementation-specific.
Chapter 7. Timer Facilities
459