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5.7.5 Virtual Address Generation
Conversion of a 64-bit effective address to a virtual
address is done by searching the Segment Lookaside
Buffer (SLB) as shown in Figure 15.
ESID V B VSID K s K p NLC / LP
64-bit Effective Address
64-s s-p p
Bit(s) Name Description
0:35 ESID Effective Segment ID
ESID Page Byte
36 V Entry valid (V=1) or invalid (V=0)
0 63-s 64-s 63-p 64-p 63
37:38 B Segment Size Selector
0b00 - 256 MB (s=28)
0b01 - 1 TB (s=40)
0b10 - reserved
Segment Lookaside
Buffer (SLB)
39:88 VSID
0b11 - reserved
Virtual Segment ID
89 K s Supervisor (privileged) state storage
SLBE0 ESID V B VSID KsKpNLC LP
key (see Section 5.7.9)
90 K p Problem state storage key (See
Section 5.7.9.)
≈ ≈ ≈ ≈ ≈ ≈
91 N No-execute segment if N=1
≈ ≈
92 L Virtual page size selector bit 0.
93 C Class
95:96 LP Virtual page size selector bits 1:2.
SLBEn
0 35 37 39 88 89 93 95 96
78-s s-p p
VSID Page Byte
Virtual Page Number (VPN)
78-bit Virtual Address
Figure 15. Translation of 64-bit effective address to
78 bit virtual address
.
0 36 37 39 89 94 95 96
All other fields are reserved. B 0 (SLBE 37 )is treated as a
reserved field.
Figure 16. SLB Entry
Instructions cannot be executed from a No-execute
(N=1) page.
The L and LP bits specify the page size or sizes that
the segment may contain as shown in Figure 17. A
Mixed Page Size (MPS) segment is a segment that
may contain 4 KB pages, 64 KB pages, or a mixture of
both. A Uniform Page Size (UPS) segment is a segment
that must contain pages of only a single size.
5.7.5.1 Segment Lookaside Buffer
(SLB)
The Segment Lookaside Buffer (SLB) specifies the
mapping between Effective Segment IDs (ESIDs) and
Virtual Segment IDs (VSIDs). The number of SLB
entries is implementation-dependent, except that all
implementations provide at least 32 entries.
The contents of the SLB are managed by software,
using the instructions described in Section 5.9.3.1. See
Chapter 10. “Synchronization Requirements for Context
Alterations” on page 467 for the rules that software
must follow when updating the SLB.
SLB Entry
Each SLB entry (SLBE, sometimes referred to as a
“segment descriptor”) maps one ESID to one VSID.
Figure 16 shows the layout of an SLB entry
SLBE L||LP
Segment
Virtual Page Size(s)
Type
0b000 MPS 4 KB, 64 KB if PTE L LP specifies
64 KB page in MPS segment, or
both sizes
0b101 UPS 64 KB if PTE L LP specifies 64 KB
page in UPS segment
additional
values 1 UPS 2 p bytes, where p > 12 and may
differ among SLB L||LP values
1 The “additional values” of SLB L||LP are implementation-dependent,
as are the corresponding virtual
page sizes.
Figure 17. SLBL L||LP Encoding
Chapter 5. Storage Control
413