Power ISA™ Version 2.03 - Power.org

Version 2.03
Vector Compare Greater Than Unsigned
Byte
VC-form
vcmpgtub VRT,VRA,VRB ( Rc=0 )
vcmpgtub. VRT,VRA,VRB ( Rc=1 )
4 VRT VRA VRB Rc 518
0 6 11 16 21 22 31
do i=0 to 127 by 8
VRT i:i+7 ((VRA) i:i+7 > ui (VRB) i:i+7 ) ? 8 1 : 8 0
if Rc=1 then do
t (VRT= 128 1)
f (VRT= 128 0)
CR6 t || 0b0 || f || 0b0
For each vector element i from 0 to 15, do the following.
Unsigned-integer byte element i in VRA is compared
to unsigned-integer byte element i in VRB.
Byte element i in VRT is set to all 1s if
unsigned-integer byte element i in VRA is greater
than to unsigned-integer byte element i in VRB,
and is set to all 0s otherwise.
Special Registers Altered:
CR6
(if Rc=1)
Vector Compare Greater Than Unsigned
Halfword
VC-form
vcmpgtuh VRT,VRA,VRB ( Rc=0 )
vcmpgtuh. VRT,VRA,VRB ( Rc=1 )
4 VRT VRA VRB Rc 582
0 6 11 16 21 22 31
do i=0 to 127 by 16
VRT i:i+15 ((VRA) i:i+15 > ui (VRB) i:i+15 ) ? 16 1 : 16 0
if Rc=1 then do
t (VRT= 128 1)
f (VRT= 128 0)
CR6 t || 0b0 || f || 0b0
For each vector element i from 0 to 7, do the following.
Unsigned-integer halfword element i in VRA is
compared to unsigned-integer halfword element i
in VRB. Halfword element i in VRT is set to all 1s if
unsigned-integer halfword element i in VRA is
greater than to unsigned-integer halfword element
i in VRB, and is set to all 0s otherwise.
Special Registers Altered:
CR6
(if Rc=1)
Vector Compare Greater Than Unsigned
Word
VC-form
vcmpgtuw VRT,VRA,VRB ( Rc=0 )
vcmpgtuw. VRT,VRA,VRB ( Rc=1 )
4 VRT VRA VRB Rc 646
0 6 11 16 21 22 31
do i=0 to 127 by 32
VRT i:i+31 ((VRA) i:i+31 > ui (VRB) i:i+31 ) ? 32 1 : 32 0
if Rc=1 then do
t (VRT= 128 1)
f (VRT= 128 0)
CR6 t || 0b0 || f || 0b0
For each vector element i from 0 to 3, do the following.
Unsigned-integer word element i in VRA is compared
to unsigned-integer word element i in VRB.
Word element i in VRT is set to all 1s if
unsigned-integer word element i in VRA is greater
than to unsigned-integer word element i in VRB,
and is set to all 0s otherwise.
Special Registers Altered:
CR6
(if Rc=1)
Chapter 5. Vector Processor [Category: Vector]
177