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5.9.2 Vector Integer Compare Instructions
The Vector Integer Compare instructions compare two
Vector Registers element by element, interpreting the
elements as unsigned or signed-integers depending on
the instruction, and set the corresponding element of
the target Vector Register to all 1s if the relation being
tested is true and to all 0s if the relation being tested is
false.
If Rc=1 CR Field 6 is set to reflect the result of the comparison,
as follows.
Bit Description
0 The relation is true for all element pairs
(i.e., VRT is set to all 1s)
1 0
2 The relation is false for all element pairs
(i.e., VRT is set to all 0s)
3 0
Programming Note
vcmpequb[.], vcmpequh[.] and vcmpequw[.] can
be used for unsigned or signed-integers.
Vector Compare Equal To Unsigned Byte
VC-form
vcmpequb VRT,VRA,VRB ( Rc=0)
vcmpequb. VRT,VRA,VRB ( Rc=1)
4 VRT VRA VRB Rc 6
0 6 11 16 21 22 31
do i=0 to 127 by 8
VRT i:i+7 ((VRA) i:i+7 = int (VRB) i:i+7 ) ? 8 1 : 8 0
if Rc=1 then do
t (VRT= 128 1)
f (VRT= 128 0)
CR6 t || 0b0 || f || 0b0
For each vector element i from 0 to 15, do the following.
Unsigned-integer byte element i in VRA is compared
to unsigned-integer byte element i in VRB.
Byte element i in VRT is set to all 1s if
unsigned-integer byte element i in VRA is equal to
unsigned-integer byte element i in VRB, and is set
to all 0s otherwise.
Special Registers Altered:
CR6
(if Rc=1)
Vector Compare Equal To Unsigned
Halfword
VC-form
vcmpequh VRT,VRA,VRB ( Rc=0)
vcmpequh. VRT,VRA,VRB ( Rc=1)
4 VRT VRA VRB Rc 70
0 6 11 16 21 22 31
do i=0 to 127 by 16
VRT i:i+15 ((VRA) i:i+15 = int (VRB) i:i+15 ) ? 16 1 : 16 0
if Rc=1 then do
t (VRT= 128 1)
f (VRT= 128 0)
CR6 t || 0b0 || f || 0b0
For each vector element i from 0 to 7, do the following.
Unsigned-integer halfword element i in VRA is
compared to unsigned-integer halfword element
element i in VRB. Halfword element i in VRT is set
to all 1s if unsigned-integer halfword element i in
VRA is equal to unsigned-integer halfword element
i in VRB, and is set to all 0s otherwise.
Special Registers Altered:
CR6
(if Rc=1)
Chapter 5. Vector Processor [Category: Vector]
175