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Power ISA™ Version 2.03 - Power.org

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<strong>Version</strong> <strong>2.03</strong><br />

Vector Load Doubleword into Doubleword<br />

by External Process ID Indexed EVX-form<br />

evlddepx<br />

RT,RA,RB<br />

31 RT RA RB 285<br />

0 6 11 16 21 31<br />

if RA = 0 then b 0<br />

else<br />

b (RA)<br />

EA b + (RB)<br />

RT MEM(EA,8)<br />

Let the effective address (EA) be the sum (RA|0)+(RB).<br />

The doubleword in storage addressed by EA is loaded<br />

into RT.<br />

For evlddepx, the normal translation mechanism is not<br />

used. The contents of the EPLC register are used to<br />

provide the context in which translation occurs. The following<br />

substitutions are made for just the translation<br />

and access control process:<br />

EPLC EPR is used in place of MSR PR<br />

EPLC EAS is used in place of MSR DS<br />

EPLC EPID is used in place of all Process ID registers<br />

This instruction is privileged.<br />

An attempt to execute evlddepx while MSR SPV =0 will<br />

cause an SPE Unavailable interrupt.<br />

Corequisite Categories:<br />

Signal Processing Engine<br />

Special Registers Altered:<br />

None<br />

Programming Note<br />

This instruction behaves identically to a evlddx<br />

instruction except for using the EPLC register to<br />

provide the translation context.<br />

Vector Store Doubleword into<br />

Doubleword by External Process ID<br />

Indexed<br />

EVX-form<br />

evstddepx<br />

RS,RA,RB<br />

31 RS RA RB 413<br />

0 6 11 16 21 31<br />

if RA = 0 then b 0<br />

else<br />

b (RA)<br />

EA b + (RB)<br />

MEM(EA,8) (RS)<br />

Let the effective address (EA) be the sum (RA|0)+(RB).<br />

(RS) is stored into the doubleword in storage<br />

addressed by EA.<br />

For evstddepx, the normal translation mechanism is<br />

not used. The contents of the EPSC register are used<br />

to provide the context in which translation occurs. The<br />

following substitutions are made for just the translation<br />

and access control process:<br />

EPSC EPR is used in place of MSR PR<br />

EPSC EAS is used in place of MSR DS<br />

EPSC EPID is used in place of all Process ID registers<br />

This instruction is privileged.<br />

An attempt to execute evstddepx while MSR SPV =0 will<br />

cause an SPE Unavailable interrupt.<br />

Corequisite Categories:<br />

Signal Processing Engine<br />

Special Registers Altered:<br />

None<br />

Programming Note<br />

This instruction behaves identically to a evstddx<br />

instruction except for using the EPSC register to<br />

provide the translation context.<br />

516<br />

<strong>Power</strong> ISA -- Book III-E

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