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Power ISA™ Version 2.03 - Power.org

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<strong>Version</strong> <strong>2.03</strong><br />

SPR(x) Special Purpose Register x<br />

TRAP Invoke the system trap handler<br />

characterization<br />

Reference to the setting of status bits, in a<br />

standard way that is explained in the text<br />

undefined An undefined value.<br />

CIA Current Instruction Address, which is the<br />

64-bit address of the instruction being<br />

described by a sequence of RTL. Used by<br />

relative branches to set the Next Instruction<br />

Address (NIA), and by Branch instructions<br />

with LK=1 to set the Link Register.<br />

Does not correspond to any architected<br />

register.<br />

NIA Next Instruction Address, which is the<br />

64-bit address of the next instruction to be<br />

executed. For a successful branch, the<br />

next instruction address is the branch target<br />

address: in RTL, this is indicated by<br />

assigning a value to NIA. For other<br />

instructions that cause non-sequential<br />

instruction fetching (see Book III), the RTL<br />

is similar. For instructions that do not<br />

branch, and do not otherwise cause<br />

instruction fetching to be non-sequential,<br />

the next instruction address is CIA+4 (VLE<br />

behavior is different; see Book VLE). Does<br />

not correspond to any architected register.<br />

if... then... else...<br />

Conditional execution, indenting shows<br />

range; else is optional.<br />

do Do loop, indenting shows range. “To” and/<br />

or “by” clauses specify incrementing an<br />

iteration variable, and a “while” clause<br />

gives termination conditions.<br />

leave Leave innermost do loop, or do loop<br />

described in leave statement.<br />

for For loop, indenting shows range. Clause<br />

after “for” specifies the entities for which to<br />

execute the body of the loop.<br />

The precedence rules for RTL operators are summarized<br />

in Table 1. Operators higher in the table are<br />

applied before those lower in the table. Operators at<br />

the same level in the table associate from left to right,<br />

from right to left, or not at all, as shown. (For example,<br />

- associates from left to right, so a-b-c = (a-b)-c.)<br />

Parentheses are used to override the evaluation order<br />

implied by the table or to increase clarity; parenthesized<br />

expressions are evaluated before serving as<br />

operands.<br />

Table 1: Operator precedence<br />

Operators<br />

Associativity<br />

+, -, left to right<br />

|| left to right<br />

=, ≠, , ≥,< u , > u , ? left to right<br />

&, ⊕, ≡<br />

left to right<br />

| left to right<br />

: (range) none<br />

, iea<br />

none<br />

Table 1: Operator precedence<br />

Operators<br />

Associativity<br />

subscript, function evaluation left to right<br />

pre-superscript (replication),<br />

right to left<br />

post-superscript (exponentiation)<br />

unary -, ¬<br />

right to left<br />

×, ÷ left to right<br />

Chapter 1. Introduction<br />

7

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