Power ISA™ Version 2.03 - Power.org

Version 2.03
Multiply Low Scaled ImmediateSCI8-form Multiply (2 operand) Low Immediate
I16A-form
e_mulli RT,RA,sci8
e_mull2i RA,si
06 RT RA 20 F SCL UI8
0 6 11 16 21 22 24 31 28 si RA 20 si
sci8 56-SCL×8 F || UI8 || SCL×8 F
prod 0:127 (RA) × sci8
RT prod 64:127
The 64-bit first operand is (RA). The 64-bit second
operand is the sci8 operand. The low-order 64-bits of
the 128-bit product of the operands are placed into register
RT.
Both operands and the product are interpreted as
signed integers.
Special Registers Altered:
None
0 6 11 16 21 31
prod 0:127 (RA) × EXTS(si)
RA prod 64:127
The 64-bit first operand is (RA). The 64-bit second
operand is the sign-extended value of the si operand.
The low-order 64-bits of the 128-bit product of the operands
are placed into register RA.
Both operands and the product are interpreted as
signed integers.
Special Registers Altered:
None
Multiply Low Word Short Form
RR-form
Negate Short Form
R-form
se_mullw
RX,RY
se_neg
RX
01 1 RY RX
0 6 8 12 15
RX (RX) 32:63 × (RY) 32:63
The 32-bit operands are the low-order 32-bits of RX
and of RY. The 64-bit product of the operands is placed
into register RX.
Both operands and the product are interpreted as
signed integers.
Special Registers Altered:
None
0 03 RX
0 6 12 15
RX ¬(RX)+ 1
The sum ¬(RX) + 1 is placed into register RX
If the processor is in 64-bit mode and register RX contains
the most negative 64-bit number
(0x8000_0000_0000_0000), the result is the most negative
64-bit number. Similarly, if the processor is in 32-
bit mode and register RX contains the most negative
32-bit number (0x8000_0000), the result is the most
negative 32-bit number.
Special Registers Altered:
None
674
Power ISA -- Book VLE