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Power ISA™ Version 2.03 - Power.org

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<strong>Version</strong> <strong>2.03</strong><br />

4.9.3 Synchronize Instruction<br />

The Synchronize instruction is described in<br />

Section 3.3.3 of Book II, but only at the level required<br />

by an application programmer. This section describes<br />

properties of the instruction that are relevant only to<br />

operating system programmers.<br />

In conjunction with the tlbie and tlbsync instructions,<br />

the sync instruction provides an ordering function for<br />

TLB invalidations and related storage accesses on<br />

other processors as described in the tlbsync instruction<br />

description on page 539.<br />

4.9.4 Lookaside Buffer<br />

Management<br />

All implementations include a TLB as the architected<br />

repository of translation, protection, and attribute information<br />

for storage.<br />

Each implementation that has a TLB or similar lookaside<br />

buffer provides a means by which software can<br />

invalidate the lookaside entry that translates a given<br />

effective address.<br />

Programming Note<br />

The invalidate all entries function is not required<br />

because each TLB entry can be addressed directly<br />

without regard to the contents of the entry.<br />

In addition, implementations provide a means by which<br />

software can do the following.<br />

Read a specified TLB entry<br />

Identify the TLB entry (if any) associated with a<br />

specified effective address<br />

Write a specified TLB entry<br />

Programming Note<br />

Because the presence, absence, and exact<br />

semantics of the TLB Management instructions are<br />

implementation-dependent, it is recommended that<br />

system software “encapsulate” uses of these<br />

instructions into subroutines to minimize the impact<br />

of moving from one implementation to another.<br />

Chapter 4. Storage Control<br />

537

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