Power ISA™ Version 2.03 - Power.org

Version 2.03
Floating Round to Integer Nearest X-form
Floating Round to Integer Plus
X-form
frin FRT,FRB (Rc=0)
frin. FRT,FRB (Rc=1)
63 FRT /// FRB 392 Rc
0 6 11 16 21 31
frip FRT,FRB (Rc=0)
frip. FRT,FRB (Rc=1)
63 FRT /// FRB 456 Rc
0 6 11 16 21 31
The floating-point operand in register FRB is rounded
to an integral value as follows, with the result placed
into register FRT. If the sign of the operand is positive,
(FRB) + 0.5 is truncated to an integral value, otherwise
(FRB) - 0.5 is truncated to an integral value.
FPSCR FPRF is set to the class and sign of the result,
except for Invalid Operation Exceptions when
FPSCR VE = 1.
Special Registers Altered:
FPRF FR (set to 0) FI (set to 0)
FX
VXSNAN
CR1 (if Rc = 1)
The floating-point operand in register FRB is rounded
to an integral value using the rounding mode round
toward +infinity, and the result is placed into register
FRT.
FPSCR FPRF is set to the class and sign of the result,
except for Invalid Operation Exceptions when
FPSCR VE = 1.
Special Registers Altered:
FPRF FR (set to 0) FI (set to 0)
FX
VXSNAN
CR1 (if Rc = 1)
Floating Round to Integer Toward Zero
X-form
friz FRT,FRB (Rc=0)
friz. FRT,FRB (Rc=1)
63 FRT /// FRB 424 Rc
0 6 11 16 21 31
The floating-point operand in register FRB is rounded
to an integral value using the rounding mode round
toward zero, and the result is placed into register FRT.
FPSCR FPRF is set to the class and sign of the result,
except for Invalid Operation Exceptions when
FPSCR VE = 1.
Special Registers Altered:
FPRF FR (set to 0) FI (set to 0)
FX
VXSNAN
CR1 (if Rc = 1)
Floating Round to Integer Minus X-form
frim FRT,FRB (Rc=0)
frim. FRT,FRB (Rc=1)
63 FRT /// FRB 488 Rc
0 6 11 16 21 31
The floating-point operand in register FRB is rounded
to an integral value using the rounding mode round
toward -infinity, and the result is placed into register
FRT.
FPSCR FPRF is set to the class and sign of the result,
except for Invalid Operation Exceptions when
FPSCR VE = 1.
Special Registers Altered:
FPRF FR (set to 0) FI (set to 0)
FX
VXSNAN
CR1 (if Rc = 1)
Chapter 4. Floating-Point Processor [Category: Floating-Point]
123